100 lines
1.5 KiB
ArmAsm
100 lines
1.5 KiB
ArmAsm
.syntax unified
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.cpu cortex-m4
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.thumb
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.equ SYSTICK_OFFSET, 0xE000E010
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.equ RCC_OFFSET, 0x40023800
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.equ GPIOD_OFFSET, 0x40020C00
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.section .text
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vtable:
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.word __stack_start
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.word __hard_reset__+1
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.align 2
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v2_img_start:
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.incbin "lab1_v2.bin"
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.align 2
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v2_img_end: @ ==__hard_reset__
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__hard_reset__:
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bl setup_leds
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bl load_systick_timer
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bl lab1_v1
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bl bootload_v2
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readloop:
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ldr.n r0, [r7, #8]
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wfi
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b.n readloop
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load_systick_timer:
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@ SysTick_LOAD
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ldr.n r7, =SYSTICK_OFFSET
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mov r1, #0x1
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lsl r1, #20
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str.n r1, [r7, #4]
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@ SysTick_CTRL
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mov r1, #0x1
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str.n r1, [r7]
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mov pc, lr
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bootload_v2:
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push {lr}
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@ bootload to ram
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ldr.n r0, =v2_img_start
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ldr.n r1, =v2_img_end
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ldr.n r3, =__ram_start
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copy_loop:
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ldr r2, [r0], #4
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str r2, [r3], #4
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cmp.n r0, r1
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bne.n copy_loop
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ldr.n r3, =__ram_start
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add r3, r3, #1
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push {r3}
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blx r3
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pop {r3}
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@ patch A
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ldr r0, =0x707ff64d @ 0xDF7F
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str r0, [r3, #0xb]
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push {r3}
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blx r3
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pop {r3}
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@ patch A and B
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ldr r0, =0x000af240 @ 0x000A
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str r0, [r3, #0xb]
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ldr r0, =0x010af240 @ 0x000A
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str r0, [r3, #0xf]
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blx r3
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pop {pc}
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setup_leds:
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@ RCC reset & enable GPIOD
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ldr r0, =RCC_OFFSET
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mov r1, #0x8
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str r1, [r0, #0x30] @ ENABLE
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@ GPIOD config
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ldr r0, =GPIOD_OFFSET
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ldr r1, =0x55000000
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str r1, [r0] @ Mode Register
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mov r1, #0xF000
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str r1, [r0, #0x14] @ Output Data Register
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mov pc, lr
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