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lab1 ... master

6 changed files with 229 additions and 4 deletions

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CROSS_COMPILE = arm-none-eabi- CROSS_COMPILE = arm-none-eabi-
GCC_COMPILE_ARGS = -x assembler-with-cpp -c -O0 -g3 -mcpu=cortex-m4 -mthumb -Wall
build: start.S build: start.o lab1.o ldscript.ld
$(CROSS_COMPILE)gcc -x assembler-with-cpp -c -O0 -g3 -mcpu=cortex-m4 -mthumb -Wall -o start.o start.S $(CROSS_COMPILE)gcc start.o lab1.o \
$(CROSS_COMPILE)gcc start.o -mcpu=cortex-m4 -mthumb -Wall --specs=nosys.specs -nostdlib -lgcc -T./ldscript.ld -o start.elf -mcpu=cortex-m4 -mthumb -Wall \
--specs=nosys.specs -nostdlib -lgcc -T./ldscript.ld \
-o start.elf
$(CROSS_COMPILE)objcopy -O binary -F elf32-littlearm start.elf start.bin $(CROSS_COMPILE)objcopy -O binary -F elf32-littlearm start.elf start.bin
start.o: start.S lab1_v2.bin
$(CROSS_COMPILE)gcc $(GCC_COMPILE_ARGS) -o start.o start.S
lab1.o: lab1.S
$(CROSS_COMPILE)gcc $(GCC_COMPILE_ARGS) -o lab1.o lab1.S
lab1_v2.bin: lab1_v2.S lab1_v2.ld
$(CROSS_COMPILE)gcc $(GCC_COMPILE_ARGS) -o lab1_v2.o lab1_v2.S
$(CROSS_COMPILE)gcc lab1_v2.o -mcpu=cortex-m4 -mthumb -Wall \
--specs=nosys.specs -nostdlib -lgcc -T./lab1_v2.ld \
-o lab1_v2.elf
$(CROSS_COMPILE)objcopy -O binary lab1_v2.elf lab1_v2.bin
qemu: build qemu: build
qemu-system-gnuarmeclipse --verbose --verbose --board STM32F4-Discovery \ qemu-system-gnuarmeclipse --verbose --verbose --board STM32F4-Discovery \
--mcu STM32F407VG -d unimp,guest_errors \ --mcu STM32F407VG -d unimp,guest_errors \

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lab1.S Normal file
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.syntax unified
.cpu cortex-m4
.thumb
.global lab1_v1
#define A 0xED76
#define B 0xFA53
#define C 10
lab1_v1:
push.n {r0, r1, r2}
ldr.n r0, =A
ldr.n r1, =B
and r0, r1
mov r1, #C
mov r2, 1
_fac:
mul r2, r2, r1
sub r1, #1
cmp.n r1, #1
bgt _fac
add r2, r2, r0, lsr #1
mov r11, r2
pop {r0, r1, r2}
mov pc, lr

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lab1_v2.S Normal file
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.syntax unified
.cpu cortex-m4
.thumb
.macro BKPT_WRITE addr_src
mov r1, \addr_src
mov r0, 0x4
bkpt 0xAB
.endm
#define A 0x0321
#define B 0x7005
#define C 0x0050
.section .text
lab1_v2:
push.n {lr}
bl calculate_formula_v2
bl int_to_str
pop.n {pc}
calculate_formula_v2:
ldr r0, =A
ldr r1, =B
ldr r2, =C
cmp r0, r1
bgt gret
blt less
same: @ default
add r2, r0, r2, lsr #3
add r0, r2, r1
b finish
gret:
rsb r0, r0, #192
sub r0, r0, r1
add r0, r2, r0, lsl #2
b finish
less:
orr r1, r1, r2
mul r0, r0, r1
finish:
mov r10, r0
mov pc, lr
int_to_str:
mov r3, sp
@ write newline + NULL terminator
mov r5, #0x000A
strh r5, [r3, #-2]!
@ --- handmade modulo ---
mov r4, #10
iterate:
mov r1, r0 @ save orig to r1
udiv r0, r0, r4 @ orig/10 and overwrite old orig value
mul r2, r0, r4 @ orig/10*10, place separately
subs r5, r1, r2 @ orig - orig/10*10 => modulo (and update flags)
beq check_if_pending_digits_exist
proceed_with_conversion:
add r5, #48 @ int -> char (only digits, so it's fine)
strb r5, [r3, #-1]! @ write next char to RAM
b iterate
check_if_pending_digits_exist:
cmp r0, #0
bne proceed_with_conversion
BKPT_WRITE r3
mov pc, lr

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lab1_v2.ld Normal file
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MEMORY
{
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}

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} }
__stack_start = ORIGIN(RAM) + LENGTH(RAM); __stack_start = ORIGIN(RAM) + LENGTH(RAM);
__ram_start = ORIGIN(RAM);

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start.S
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.cpu cortex-m4 .cpu cortex-m4
.thumb .thumb
.equ SYSTICK_OFFSET, 0xE000E010
.equ RCC_OFFSET, 0x40023800
.equ GPIOD_OFFSET, 0x40020C00
.section .text
vtable: vtable:
.word __stack_start .word __stack_start
.word __hard_reset__+1 .word __hard_reset__+1
.align 2
v2_img_start:
.incbin "lab1_v2.bin"
.align 2
v2_img_end: @ ==__hard_reset__
__hard_reset__: __hard_reset__:
b __hard_reset__ bl setup_leds
bl load_systick_timer
bl lab1_v1
bl bootload_v2
readloop:
ldr.n r0, [r7, #8]
wfi
b.n readloop
load_systick_timer:
@ SysTick_LOAD
ldr.n r7, =SYSTICK_OFFSET
mov r1, #0x1
lsl r1, #20
str.n r1, [r7, #4]
@ SysTick_CTRL
mov r1, #0x1
str.n r1, [r7]
mov pc, lr
bootload_v2:
push {lr}
@ bootload to ram
ldr.n r0, =v2_img_start
ldr.n r1, =v2_img_end
ldr.n r3, =__ram_start
copy_loop:
ldr r2, [r0], #4
str r2, [r3], #4
cmp.n r0, r1
bne.n copy_loop
ldr.n r3, =__ram_start
add r3, r3, #1
push {r3}
blx r3
pop {r3}
@ patch A
ldr r0, =0x707ff64d @ 0xDF7F
str r0, [r3, #0xb]
push {r3}
blx r3
pop {r3}
@ patch A and B
ldr r0, =0x000af240 @ 0x000A
str r0, [r3, #0xb]
ldr r0, =0x010af240 @ 0x000A
str r0, [r3, #0xf]
blx r3
pop {pc}
setup_leds:
@ RCC reset & enable GPIOD
ldr r0, =RCC_OFFSET
mov r1, #0x8
str r1, [r0, #0x30] @ ENABLE
@ GPIOD config
ldr r0, =GPIOD_OFFSET
ldr r1, =0x55000000
str r1, [r0] @ Mode Register
mov r1, #0xF000
str r1, [r0, #0x14] @ Output Data Register
mov pc, lr