lab2-extra: enable LEDs by performing direct register writes

Makefile

@@ -23,7 +23,7 @@ lab1_v2.bin: lab1_v2.S lab1_v2.ld
 
 qemu: build
 	qemu-system-gnuarmeclipse --verbose --verbose --board STM32F4-Discovery \
-		--mcu STM32F407VG -d unimp,guest_errors --nographic \
+		--mcu STM32F407VG -d unimp,guest_errors \
 		--semihosting-config enable=on,target=native -s -S \
 		--image start.bin
 

lab1_v2.S

@@ -2,26 +2,81 @@
 .cpu cortex-m4
 .thumb
 
-.section .data
+.macro BKPT_WRITE addr_src
-    test_string: .asciz "Hello"
+    mov r1, \addr_src
+    mov r0, 0x4
+    bkpt 0xAB
+.endm
+
+#define A 0x0321
+#define B 0x7005
+#define C 0x0050
 
 .section .text
 
 lab1_v2:
-    sub sp, #6
+    push.n {lr}
-    ldr r0, =test_string
-    mov r1, #5
 
-    copy_loop:
+    bl calculate_formula_v2
-    ldrb r2, [r0, r1]
+    bl int_to_str
-    strb r2, [sp, r1]
-    subs r1, #1
-    bpl copy_loop
 
-    mov r1, sp
+    pop.n {pc}
-    mov r0, 0x04
-    bkpt 0xAB
 
-    add sp, #6
+calculate_formula_v2:
+    ldr r0, =A
+    ldr r1, =B
+    ldr r2, =C
+
+    cmp r0, r1
+    bgt gret
+    blt less
+
+    same: @ default
+    add r2, r0, r2, lsr #3
+    add r0, r2, r1
+    b finish
+
+    gret:
+    rsb r0, r0, #192
+    sub r0, r0, r1
+    add r0, r2, r0, lsl #2
+    b finish
+
+    less:
+    orr r1, r1, r2
+    mul r0, r0, r1
+
+    finish:
+    mov r10, r0
+    mov pc, lr
+
+int_to_str:
+    mov r3, sp
+
+    @ write newline + NULL terminator
+    mov r5, #0x000A
+    strh r5, [r3, #-2]!
+
+    @ --- handmade modulo ---
+    mov r4, #10
+
+    iterate:
+    mov  r1, r0       @ save orig to r1
+    udiv r0, r0, r4   @ orig/10 and overwrite old orig value
+    mul  r2, r0, r4   @ orig/10*10, place separately
+    subs r5, r1, r2   @ orig - orig/10*10 => modulo (and update flags)
+
+    beq check_if_pending_digits_exist
+    proceed_with_conversion:
+
+    add r5, #48           @ int -> char (only digits, so it's fine)
+    strb r5, [r3, #-1]!   @ write next char to RAM
+    b iterate
+
+    check_if_pending_digits_exist:
+    cmp r0, #0
+    bne proceed_with_conversion
+
+    BKPT_WRITE r3
 
     mov pc, lr

start.S

@@ -3,25 +3,30 @@
 .thumb
 
 .equ SYSTICK_OFFSET, 0xE000E010
+.equ RCC_OFFSET, 0x40023800
+.equ GPIOD_OFFSET, 0x40020C00
 
 .section .text
 
 vtable:
     .word __stack_start
     .word __hard_reset__+1
+    .align 2
 v2_img_start:
     .incbin "lab1_v2.bin"
+    .align 2
 v2_img_end: @ ==__hard_reset__
 
 __hard_reset__:
+    bl setup_leds
     bl load_systick_timer
     bl lab1_v1
 
     bl bootload_v2
 
-
     readloop:
     ldr.n r0, [r7, #8]
+    wfi
     b.n readloop
 
 load_systick_timer:
@@ -46,13 +51,49 @@ bootload_v2:
     ldr.n r3, =__ram_start
 
     copy_loop:
-    ldrh r2, [r0], #2
+    ldr r2, [r0], #4
-    strh r2, [r3], #2
+    str r2, [r3], #4
     cmp.n r0, r1
     bne.n copy_loop
 
     ldr.n r3, =__ram_start
     add r3, r3, #1
+
+    push {r3}
+    blx r3
+    pop {r3}
+
+    @ patch A
+    ldr r0, =0x707ff64d @ 0xDF7F
+    str r0, [r3, #0xb]
+
+    push {r3}
+    blx r3
+    pop {r3}
+
+    @ patch A and B
+    ldr r0, =0x000af240 @ 0x000A
+    str r0, [r3, #0xb]
+    ldr r0, =0x010af240 @ 0x000A
+    str r0, [r3, #0xf]
+
     blx r3
 
     pop {pc}
+
+setup_leds:
+    @ RCC reset & enable GPIOD
+    ldr r0, =RCC_OFFSET
+    mov r1, #0x8
+    str r1, [r0, #0x30] @ ENABLE
+
+    @ GPIOD config
+    ldr r0, =GPIOD_OFFSET
+
+    ldr r1, =0x55000000
+    str r1, [r0] @ Mode Register
+
+    mov r1, #0xF000
+    str r1, [r0, #0x14] @ Output Data Register
+
+    mov pc, lr