diff --git a/Makefile b/Makefile index 322ca2b..7e4ed41 100644 --- a/Makefile +++ b/Makefile @@ -1,13 +1,29 @@ CROSS_COMPILE = arm-none-eabi- +GCC_COMPILE_ARGS = -x assembler-with-cpp -c -O0 -g3 -mcpu=cortex-m4 -mthumb -Wall -build: start.S - $(CROSS_COMPILE)gcc -x assembler-with-cpp -c -O0 -g3 -mcpu=cortex-m4 -mthumb -Wall -o start.o start.S - $(CROSS_COMPILE)gcc start.o -mcpu=cortex-m4 -mthumb -Wall --specs=nosys.specs -nostdlib -lgcc -T./ldscript.ld -o start.elf +build: start.o lab1.o ldscript.ld + $(CROSS_COMPILE)gcc start.o lab1.o \ + -mcpu=cortex-m4 -mthumb -Wall \ + --specs=nosys.specs -nostdlib -lgcc -T./ldscript.ld \ + -o start.elf $(CROSS_COMPILE)objcopy -O binary -F elf32-littlearm start.elf start.bin +start.o: start.S lab1_v2.bin + $(CROSS_COMPILE)gcc $(GCC_COMPILE_ARGS) -o start.o start.S + +lab1.o: lab1.S + $(CROSS_COMPILE)gcc $(GCC_COMPILE_ARGS) -o lab1.o lab1.S + +lab1_v2.bin: lab1_v2.S lab1_v2.ld + $(CROSS_COMPILE)gcc $(GCC_COMPILE_ARGS) -o lab1_v2.o lab1_v2.S + $(CROSS_COMPILE)gcc lab1_v2.o -mcpu=cortex-m4 -mthumb -Wall \ + --specs=nosys.specs -nostdlib -lgcc -T./lab1_v2.ld \ + -o lab1_v2.elf + $(CROSS_COMPILE)objcopy -O binary lab1_v2.elf lab1_v2.bin + qemu: build qemu-system-gnuarmeclipse --verbose --verbose --board STM32F4-Discovery \ - --mcu STM32F407VG -d unimp,guest_errors \ + --mcu STM32F407VG -d unimp,guest_errors --nographic \ --semihosting-config enable=on,target=native -s -S \ --image start.bin diff --git a/lab1.S b/lab1.S new file mode 100644 index 0000000..8ea1888 --- /dev/null +++ b/lab1.S @@ -0,0 +1,33 @@ +.syntax unified +.cpu cortex-m4 +.thumb + +.global lab1_v1 + +#define A 0xED76 +#define B 0xFA53 +#define C 10 + +lab1_v1: + push.n {r0, r1, r2} + + ldr.n r0, =A + ldr.n r1, =B + + and r0, r1 + + mov r1, #C + mov r2, 1 + + _fac: + mul r2, r2, r1 + sub r1, #1 + cmp.n r1, #1 + bgt _fac + + add r2, r2, r0, lsr #1 + mov r11, r2 + + pop {r0, r1, r2} + + mov pc, lr diff --git a/lab1_v2.S b/lab1_v2.S new file mode 100644 index 0000000..5d01506 --- /dev/null +++ b/lab1_v2.S @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb + +.section .data + test_string: .asciz "Hello" + +.section .text + +lab1_v2: + sub sp, #6 + ldr r0, =test_string + mov r1, #5 + + copy_loop: + ldrb r2, [r0, r1] + strb r2, [sp, r1] + subs r1, #1 + bpl copy_loop + + mov r1, sp + mov r0, 0x04 + bkpt 0xAB + + add sp, #6 + + mov pc, lr diff --git a/lab1_v2.ld b/lab1_v2.ld new file mode 100644 index 0000000..bb565ed --- /dev/null +++ b/lab1_v2.ld @@ -0,0 +1,4 @@ +MEMORY +{ + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K +} diff --git a/ldscript.ld b/ldscript.ld index 222b46d..711e348 100644 --- a/ldscript.ld +++ b/ldscript.ld @@ -5,3 +5,4 @@ MEMORY } __stack_start = ORIGIN(RAM) + LENGTH(RAM); +__ram_start = ORIGIN(RAM); diff --git a/start.S b/start.S index c02fde2..4e4ae05 100644 --- a/start.S +++ b/start.S @@ -2,9 +2,57 @@ .cpu cortex-m4 .thumb +.equ SYSTICK_OFFSET, 0xE000E010 + +.section .text + vtable: .word __stack_start .word __hard_reset__+1 +v2_img_start: + .incbin "lab1_v2.bin" +v2_img_end: @ ==__hard_reset__ __hard_reset__: - b __hard_reset__ + bl load_systick_timer + bl lab1_v1 + + bl bootload_v2 + + + readloop: + ldr.n r0, [r7, #8] + b.n readloop + +load_systick_timer: + @ SysTick_LOAD + ldr.n r7, =SYSTICK_OFFSET + mov r1, #0x1 + lsl r1, #20 + str.n r1, [r7, #4] + + @ SysTick_CTRL + mov r1, #0x1 + str.n r1, [r7] + + mov pc, lr + +bootload_v2: + push {lr} + + @ bootload to ram + ldr.n r0, =v2_img_start + ldr.n r1, =v2_img_end + ldr.n r3, =__ram_start + + copy_loop: + ldrh r2, [r0], #2 + strh r2, [r3], #2 + cmp.n r0, r1 + bne.n copy_loop + + ldr.n r3, =__ram_start + add r3, r3, #1 + blx r3 + + pop {pc}