[KSZ8081RND] first attempt at testing Ethernet
This commit is contained in:
parent
7799cdc871
commit
cae7fe1ed2
File diff suppressed because one or more lines are too long
|
|
@ -45,7 +45,7 @@
|
||||||
/* #define HAL_DAC_MODULE_ENABLED */
|
/* #define HAL_DAC_MODULE_ENABLED */
|
||||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||||
/* #define HAL_ETH_MODULE_ENABLED */
|
#define HAL_ETH_MODULE_ENABLED
|
||||||
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
|
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||||
/* #define HAL_NAND_MODULE_ENABLED */
|
/* #define HAL_NAND_MODULE_ENABLED */
|
||||||
/* #define HAL_NOR_MODULE_ENABLED */
|
/* #define HAL_NOR_MODULE_ENABLED */
|
||||||
|
|
@ -54,7 +54,7 @@
|
||||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||||
/* #define HAL_HASH_MODULE_ENABLED */
|
/* #define HAL_HASH_MODULE_ENABLED */
|
||||||
#define HAL_I2C_MODULE_ENABLED
|
#define HAL_I2C_MODULE_ENABLED
|
||||||
#define HAL_I2S_MODULE_ENABLED
|
/* #define HAL_I2S_MODULE_ENABLED */
|
||||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||||
/* #define HAL_RNG_MODULE_ENABLED */
|
/* #define HAL_RNG_MODULE_ENABLED */
|
||||||
|
|
@ -214,7 +214,7 @@
|
||||||
#define MAC_ADDR5 0U
|
#define MAC_ADDR5 0U
|
||||||
|
|
||||||
/* Definition of the Ethernet driver buffers size and count */
|
/* Definition of the Ethernet driver buffers size and count */
|
||||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
#define ETH_RX_BUF_SIZE 1524 /* buffer size for receive */
|
||||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||||
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||||
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||||
|
|
|
||||||
|
|
@ -4,7 +4,7 @@
|
||||||
|
|
||||||
#define SAMPLE_AMOUNT 256
|
#define SAMPLE_AMOUNT 256
|
||||||
|
|
||||||
extern I2S_HandleTypeDef hi2s2;
|
//extern I2S_HandleTypeDef hi2s2;
|
||||||
|
|
||||||
int MP45DT02_run_test(void)
|
int MP45DT02_run_test(void)
|
||||||
{
|
{
|
||||||
|
|
@ -14,7 +14,31 @@ int MP45DT02_run_test(void)
|
||||||
uint16_t sample_buffer[SAMPLE_AMOUNT];
|
uint16_t sample_buffer[SAMPLE_AMOUNT];
|
||||||
|
|
||||||
for (size_t t = 0; t < 5; t++) {
|
for (size_t t = 0; t < 5; t++) {
|
||||||
HAL_I2S_Receive(&hi2s2, sample_buffer, SAMPLE_AMOUNT, 1000);
|
//HAL_I2S_Receive(&hi2s2, sample_buffer, SAMPLE_AMOUNT, 1000);
|
||||||
|
|
||||||
|
for (size_t i = 0; i < SAMPLE_AMOUNT; i++) {
|
||||||
|
sample_buffer[i] = 0;
|
||||||
|
for (size_t j = 0; j < 16; j++) {
|
||||||
|
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_10, GPIO_PIN_SET);
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
sample_buffer[i] <<= 1;
|
||||||
|
sample_buffer[i] |= HAL_GPIO_ReadPin(GPIOC, GPIO_PIN_3);
|
||||||
|
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_10, GPIO_PIN_RESET);
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
asm("nop");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
for (size_t i = 0; i < SAMPLE_AMOUNT / 2; i++)
|
for (size_t i = 0; i < SAMPLE_AMOUNT / 2; i++)
|
||||||
if (((uint32_t *) sample_buffer)[i]) {
|
if (((uint32_t *) sample_buffer)[i]) {
|
||||||
|
|
|
||||||
137
Core/Src/main.c
137
Core/Src/main.c
|
|
@ -18,6 +18,7 @@
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "main.h"
|
#include "main.h"
|
||||||
|
#include "string.h"
|
||||||
|
|
||||||
/* Private includes ----------------------------------------------------------*/
|
/* Private includes ----------------------------------------------------------*/
|
||||||
/* USER CODE BEGIN Includes */
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
@ -66,11 +67,16 @@
|
||||||
/* USER CODE END PM */
|
/* USER CODE END PM */
|
||||||
|
|
||||||
/* Private variables ---------------------------------------------------------*/
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
|
||||||
|
ETH_TxPacketConfig TxConfig;
|
||||||
|
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
|
||||||
|
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
|
||||||
|
|
||||||
ADC_HandleTypeDef hadc1;
|
ADC_HandleTypeDef hadc1;
|
||||||
|
|
||||||
I2C_HandleTypeDef hi2c1;
|
ETH_HandleTypeDef heth;
|
||||||
|
|
||||||
I2S_HandleTypeDef hi2s2;
|
I2C_HandleTypeDef hi2c1;
|
||||||
|
|
||||||
SPI_HandleTypeDef hspi1;
|
SPI_HandleTypeDef hspi1;
|
||||||
|
|
||||||
|
|
@ -106,6 +112,8 @@ static const void ((*cleanup_functions[])(void)) = {
|
||||||
NULL
|
NULL
|
||||||
};
|
};
|
||||||
|
|
||||||
|
unsigned int eth_errorred = 0;
|
||||||
|
|
||||||
/* USER CODE END PV */
|
/* USER CODE END PV */
|
||||||
|
|
||||||
/* Private function prototypes -----------------------------------------------*/
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
|
@ -115,7 +123,7 @@ static void MX_ADC1_Init(void);
|
||||||
static void MX_I2C1_Init(void);
|
static void MX_I2C1_Init(void);
|
||||||
static void MX_SPI1_Init(void);
|
static void MX_SPI1_Init(void);
|
||||||
static void MX_TIM2_Init(void);
|
static void MX_TIM2_Init(void);
|
||||||
static void MX_I2S2_Init(void);
|
static void MX_ETH_Init(void);
|
||||||
/* USER CODE BEGIN PFP */
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
/* USER CODE END PFP */
|
/* USER CODE END PFP */
|
||||||
|
|
@ -158,9 +166,9 @@ int main(void)
|
||||||
MX_I2C1_Init();
|
MX_I2C1_Init();
|
||||||
MX_SPI1_Init();
|
MX_SPI1_Init();
|
||||||
MX_TIM2_Init();
|
MX_TIM2_Init();
|
||||||
MX_I2S2_Init();
|
MX_ETH_Init();
|
||||||
/* USER CODE BEGIN 2 */
|
/* USER CODE BEGIN 2 */
|
||||||
|
back_to_life:
|
||||||
GPIOD->BSRR = 0x1000;
|
GPIOD->BSRR = 0x1000;
|
||||||
display_init();
|
display_init();
|
||||||
|
|
||||||
|
|
@ -372,6 +380,55 @@ static void MX_ADC1_Init(void)
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ETH Initialization Function
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
static void MX_ETH_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN ETH_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END ETH_Init 0 */
|
||||||
|
|
||||||
|
static uint8_t MACAddr[6];
|
||||||
|
|
||||||
|
/* USER CODE BEGIN ETH_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END ETH_Init 1 */
|
||||||
|
heth.Instance = ETH;
|
||||||
|
MACAddr[0] = 0x00;
|
||||||
|
MACAddr[1] = 0x80;
|
||||||
|
MACAddr[2] = 0xE1;
|
||||||
|
MACAddr[3] = 0x00;
|
||||||
|
MACAddr[4] = 0x00;
|
||||||
|
MACAddr[5] = 0x00;
|
||||||
|
heth.Init.MACAddr = &MACAddr[0];
|
||||||
|
heth.Init.MediaInterface = HAL_ETH_RMII_MODE;
|
||||||
|
heth.Init.TxDesc = DMATxDscrTab;
|
||||||
|
heth.Init.RxDesc = DMARxDscrTab;
|
||||||
|
heth.Init.RxBuffLen = 1524;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN MACADDRESS */
|
||||||
|
|
||||||
|
/* USER CODE END MACADDRESS */
|
||||||
|
|
||||||
|
if (HAL_ETH_Init(&heth) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
|
||||||
|
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
|
||||||
|
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
|
||||||
|
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
|
||||||
|
/* USER CODE BEGIN ETH_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END ETH_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2C1 Initialization Function
|
* @brief I2C1 Initialization Function
|
||||||
* @param None
|
* @param None
|
||||||
|
|
@ -406,40 +463,6 @@ static void MX_I2C1_Init(void)
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief I2S2 Initialization Function
|
|
||||||
* @param None
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
static void MX_I2S2_Init(void)
|
|
||||||
{
|
|
||||||
|
|
||||||
/* USER CODE BEGIN I2S2_Init 0 */
|
|
||||||
|
|
||||||
/* USER CODE END I2S2_Init 0 */
|
|
||||||
|
|
||||||
/* USER CODE BEGIN I2S2_Init 1 */
|
|
||||||
|
|
||||||
/* USER CODE END I2S2_Init 1 */
|
|
||||||
hi2s2.Instance = SPI2;
|
|
||||||
hi2s2.Init.Mode = I2S_MODE_MASTER_RX;
|
|
||||||
hi2s2.Init.Standard = I2S_STANDARD_PHILIPS;
|
|
||||||
hi2s2.Init.DataFormat = I2S_DATAFORMAT_16B;
|
|
||||||
hi2s2.Init.MCLKOutput = I2S_MCLKOUTPUT_DISABLE;
|
|
||||||
hi2s2.Init.AudioFreq = I2S_AUDIOFREQ_48K;
|
|
||||||
hi2s2.Init.CPOL = I2S_CPOL_LOW;
|
|
||||||
hi2s2.Init.ClockSource = I2S_CLOCK_PLL;
|
|
||||||
hi2s2.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_DISABLE;
|
|
||||||
if (HAL_I2S_Init(&hi2s2) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
/* USER CODE BEGIN I2S2_Init 2 */
|
|
||||||
|
|
||||||
/* USER CODE END I2S2_Init 2 */
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief SPI1 Initialization Function
|
* @brief SPI1 Initialization Function
|
||||||
* @param None
|
* @param None
|
||||||
|
|
@ -545,12 +568,20 @@ static void MX_GPIO_Init(void)
|
||||||
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12
|
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12
|
||||||
|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15, GPIO_PIN_RESET);
|
|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15, GPIO_PIN_RESET);
|
||||||
|
|
||||||
|
/*Configure GPIO pin Output Level */
|
||||||
|
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_10|GPIO_PIN_7, GPIO_PIN_RESET);
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||||||
|GPIO_PIN_15|GPIO_PIN_4|GPIO_PIN_7, GPIO_PIN_RESET);
|
|GPIO_PIN_15|GPIO_PIN_4|GPIO_PIN_7, GPIO_PIN_RESET);
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pins : PC3 PC6 PC8 PC9
|
||||||
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_RESET);
|
PC11 */
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_6|GPIO_PIN_8|GPIO_PIN_9
|
||||||
|
|GPIO_PIN_11;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pins : PA0 PA15 */
|
/*Configure GPIO pins : PA0 PA15 */
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_15;
|
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_15;
|
||||||
|
|
@ -567,6 +598,13 @@ static void MX_GPIO_Init(void)
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : PB10 PB7 */
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_7;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pin : PD11 */
|
/*Configure GPIO pin : PD11 */
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_11;
|
GPIO_InitStruct.Pin = GPIO_PIN_11;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
|
@ -583,19 +621,6 @@ static void MX_GPIO_Init(void)
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pins : PC6 PC8 PC9 PC11 */
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_11;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/*Configure GPIO pin : PB7 */
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
||||||
/* USER CODE END MX_GPIO_Init_2 */
|
/* USER CODE END MX_GPIO_Init_2 */
|
||||||
}
|
}
|
||||||
|
|
@ -612,6 +637,10 @@ void Error_Handler(void)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN Error_Handler_Debug */
|
/* USER CODE BEGIN Error_Handler_Debug */
|
||||||
/* User can add his own implementation to report the HAL error return state */
|
/* User can add his own implementation to report the HAL error return state */
|
||||||
|
eth_errorred = 1;
|
||||||
|
return;
|
||||||
|
//goto back_to_life;
|
||||||
|
|
||||||
__disable_irq();
|
__disable_irq();
|
||||||
while (1)
|
while (1)
|
||||||
{
|
{
|
||||||
|
|
|
||||||
|
|
@ -140,6 +140,116 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ETH MSP Initialization
|
||||||
|
* This function configures the hardware resources used in this example
|
||||||
|
* @param heth: ETH handle pointer
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
|
||||||
|
{
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
if(heth->Instance==ETH)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN ETH_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END ETH_MspInit 0 */
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_ETH_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
/**ETH GPIO Configuration
|
||||||
|
PC1 ------> ETH_MDC
|
||||||
|
PA1 ------> ETH_REF_CLK
|
||||||
|
PA2 ------> ETH_MDIO
|
||||||
|
PA7 ------> ETH_CRS_DV
|
||||||
|
PC4 ------> ETH_RXD0
|
||||||
|
PC5 ------> ETH_RXD1
|
||||||
|
PB11 ------> ETH_TX_EN
|
||||||
|
PB12 ------> ETH_TXD0
|
||||||
|
PB13 ------> ETH_TXD1
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN ETH_MspInit 1 */
|
||||||
|
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_10, GPIO_PIN_RESET);
|
||||||
|
HAL_Delay(200);
|
||||||
|
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_7, GPIO_PIN_SET);
|
||||||
|
HAL_Delay(200);
|
||||||
|
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_10, GPIO_PIN_SET);
|
||||||
|
HAL_Delay(200);
|
||||||
|
|
||||||
|
uint32_t r;
|
||||||
|
HAL_ETH_ReadPHYRegister(heth, 0x0, 0x1F, &r);
|
||||||
|
r |= (1 << 7);
|
||||||
|
HAL_ETH_WritePHYRegister(heth, 0x0, 0x1F, r);
|
||||||
|
/* USER CODE END ETH_MspInit 1 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ETH MSP De-Initialization
|
||||||
|
* This function freeze the hardware resources used in this example
|
||||||
|
* @param heth: ETH handle pointer
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
|
||||||
|
{
|
||||||
|
if(heth->Instance==ETH)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN ETH_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END ETH_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_ETH_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**ETH GPIO Configuration
|
||||||
|
PC1 ------> ETH_MDC
|
||||||
|
PA1 ------> ETH_REF_CLK
|
||||||
|
PA2 ------> ETH_MDIO
|
||||||
|
PA7 ------> ETH_CRS_DV
|
||||||
|
PC4 ------> ETH_RXD0
|
||||||
|
PC5 ------> ETH_RXD1
|
||||||
|
PB11 ------> ETH_TX_EN
|
||||||
|
PB12 ------> ETH_TXD0
|
||||||
|
PB13 ------> ETH_TXD1
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN ETH_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END ETH_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2C MSP Initialization
|
* @brief I2C MSP Initialization
|
||||||
* This function configures the hardware resources used in this example
|
* This function configures the hardware resources used in this example
|
||||||
|
|
@ -208,96 +318,6 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief I2S MSP Initialization
|
|
||||||
* This function configures the hardware resources used in this example
|
|
||||||
* @param hi2s: I2S handle pointer
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void HAL_I2S_MspInit(I2S_HandleTypeDef* hi2s)
|
|
||||||
{
|
|
||||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
||||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
|
||||||
if(hi2s->Instance==SPI2)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN SPI2_MspInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END SPI2_MspInit 0 */
|
|
||||||
|
|
||||||
/** Initializes the peripherals clock
|
|
||||||
*/
|
|
||||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
|
|
||||||
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
|
|
||||||
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
|
|
||||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Peripheral clock enable */
|
|
||||||
__HAL_RCC_SPI2_CLK_ENABLE();
|
|
||||||
|
|
||||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
||||||
/**I2S2 GPIO Configuration
|
|
||||||
PC3 ------> I2S2_SD
|
|
||||||
PB10 ------> I2S2_CK
|
|
||||||
PB12 ------> I2S2_WS
|
|
||||||
*/
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
|
||||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_12;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN SPI2_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END SPI2_MspInit 1 */
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief I2S MSP De-Initialization
|
|
||||||
* This function freeze the hardware resources used in this example
|
|
||||||
* @param hi2s: I2S handle pointer
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void HAL_I2S_MspDeInit(I2S_HandleTypeDef* hi2s)
|
|
||||||
{
|
|
||||||
if(hi2s->Instance==SPI2)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN SPI2_MspDeInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END SPI2_MspDeInit 0 */
|
|
||||||
/* Peripheral clock disable */
|
|
||||||
__HAL_RCC_SPI2_CLK_DISABLE();
|
|
||||||
|
|
||||||
/**I2S2 GPIO Configuration
|
|
||||||
PC3 ------> I2S2_SD
|
|
||||||
PB10 ------> I2S2_CK
|
|
||||||
PB12 ------> I2S2_WS
|
|
||||||
*/
|
|
||||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_3);
|
|
||||||
|
|
||||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_12);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN SPI2_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END SPI2_MspDeInit 1 */
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief SPI MSP Initialization
|
* @brief SPI MSP Initialization
|
||||||
* This function configures the hardware resources used in this example
|
* This function configures the hardware resources used in this example
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,618 +0,0 @@
|
||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file stm32f4xx_hal_i2s.h
|
|
||||||
* @author MCD Application Team
|
|
||||||
* @brief Header file of I2S HAL module.
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2016 STMicroelectronics.
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
|
||||||
* in the root directory of this software component.
|
|
||||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
|
||||||
#ifndef STM32F4xx_HAL_I2S_H
|
|
||||||
#define STM32F4xx_HAL_I2S_H
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
|
||||||
#include "stm32f4xx_hal_def.h"
|
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_HAL_Driver
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup I2S
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported types ------------------------------------------------------------*/
|
|
||||||
/** @defgroup I2S_Exported_Types I2S Exported Types
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief I2S Init structure definition
|
|
||||||
*/
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
uint32_t Mode; /*!< Specifies the I2S operating mode.
|
|
||||||
This parameter can be a value of @ref I2S_Mode */
|
|
||||||
|
|
||||||
uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
|
|
||||||
This parameter can be a value of @ref I2S_Standard */
|
|
||||||
|
|
||||||
uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
|
|
||||||
This parameter can be a value of @ref I2S_Data_Format */
|
|
||||||
|
|
||||||
uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
|
|
||||||
This parameter can be a value of @ref I2S_MCLK_Output */
|
|
||||||
|
|
||||||
uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
|
|
||||||
This parameter can be a value of @ref I2S_Audio_Frequency */
|
|
||||||
|
|
||||||
uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
|
|
||||||
This parameter can be a value of @ref I2S_Clock_Polarity */
|
|
||||||
|
|
||||||
uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
|
|
||||||
This parameter can be a value of @ref I2S_Clock_Source */
|
|
||||||
uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
|
|
||||||
This parameter can be a value of @ref I2S_FullDuplex_Mode */
|
|
||||||
} I2S_InitTypeDef;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief HAL State structures definition
|
|
||||||
*/
|
|
||||||
typedef enum
|
|
||||||
{
|
|
||||||
HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
|
|
||||||
HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
|
|
||||||
HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
|
|
||||||
HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
|
|
||||||
HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
|
|
||||||
HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
|
|
||||||
HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
|
|
||||||
HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
|
|
||||||
} HAL_I2S_StateTypeDef;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief I2S handle Structure definition
|
|
||||||
*/
|
|
||||||
typedef struct __I2S_HandleTypeDef
|
|
||||||
{
|
|
||||||
SPI_TypeDef *Instance; /*!< I2S registers base address */
|
|
||||||
|
|
||||||
I2S_InitTypeDef Init; /*!< I2S communication parameters */
|
|
||||||
|
|
||||||
uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
|
|
||||||
|
|
||||||
__IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
|
|
||||||
|
|
||||||
__IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
|
|
||||||
|
|
||||||
uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
|
|
||||||
|
|
||||||
__IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
|
|
||||||
|
|
||||||
__IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
|
|
||||||
(This field is initialized at the
|
|
||||||
same value as transfer size at the
|
|
||||||
beginning of the transfer and
|
|
||||||
decremented when a sample is received
|
|
||||||
NbSamplesReceived = RxBufferSize-RxBufferCount) */
|
|
||||||
void (*IrqHandlerISR)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */
|
|
||||||
|
|
||||||
DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
|
|
||||||
|
|
||||||
DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
|
|
||||||
|
|
||||||
__IO HAL_LockTypeDef Lock; /*!< I2S locking object */
|
|
||||||
|
|
||||||
__IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
|
|
||||||
|
|
||||||
__IO uint32_t ErrorCode; /*!< I2S Error code
|
|
||||||
This parameter can be a value of @ref I2S_Error */
|
|
||||||
|
|
||||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
||||||
void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */
|
|
||||||
void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */
|
|
||||||
void (* TxRxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Completed callback */
|
|
||||||
void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */
|
|
||||||
void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */
|
|
||||||
void (* TxRxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Half Completed callback */
|
|
||||||
void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */
|
|
||||||
void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */
|
|
||||||
void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */
|
|
||||||
|
|
||||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
||||||
} I2S_HandleTypeDef;
|
|
||||||
|
|
||||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
||||||
/**
|
|
||||||
* @brief HAL I2S Callback ID enumeration definition
|
|
||||||
*/
|
|
||||||
typedef enum
|
|
||||||
{
|
|
||||||
HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */
|
|
||||||
HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */
|
|
||||||
HAL_I2S_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< I2S TxRx Completed callback ID */
|
|
||||||
HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */
|
|
||||||
HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */
|
|
||||||
HAL_I2S_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< I2S TxRx Half Completed callback ID */
|
|
||||||
HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */
|
|
||||||
HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */
|
|
||||||
HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */
|
|
||||||
|
|
||||||
} HAL_I2S_CallbackIDTypeDef;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief HAL I2S Callback pointer definition
|
|
||||||
*/
|
|
||||||
typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */
|
|
||||||
|
|
||||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported constants --------------------------------------------------------*/
|
|
||||||
/** @defgroup I2S_Exported_Constants I2S Exported Constants
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/** @defgroup I2S_Error I2S Error
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
|
|
||||||
#define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
|
|
||||||
#define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
|
|
||||||
#define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
|
|
||||||
#define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
|
|
||||||
#define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
|
|
||||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
||||||
#define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /*!< Invalid Callback error */
|
|
||||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
||||||
#define HAL_I2S_ERROR_BUSY_LINE_RX (0x00000040U) /*!< Busy Rx Line error */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_Mode I2S Mode
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_MODE_SLAVE_TX (0x00000000U)
|
|
||||||
#define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0)
|
|
||||||
#define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1)
|
|
||||||
#define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1))
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_Standard I2S Standard
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_STANDARD_PHILIPS (0x00000000U)
|
|
||||||
#define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0)
|
|
||||||
#define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1)
|
|
||||||
#define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1))
|
|
||||||
#define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC))
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_Data_Format I2S Data Format
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_DATAFORMAT_16B (0x00000000U)
|
|
||||||
#define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN)
|
|
||||||
#define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
|
|
||||||
#define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_MCLK_Output I2S MCLK Output
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE)
|
|
||||||
#define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_AUDIOFREQ_192K (192000U)
|
|
||||||
#define I2S_AUDIOFREQ_96K (96000U)
|
|
||||||
#define I2S_AUDIOFREQ_48K (48000U)
|
|
||||||
#define I2S_AUDIOFREQ_44K (44100U)
|
|
||||||
#define I2S_AUDIOFREQ_32K (32000U)
|
|
||||||
#define I2S_AUDIOFREQ_22K (22050U)
|
|
||||||
#define I2S_AUDIOFREQ_16K (16000U)
|
|
||||||
#define I2S_AUDIOFREQ_11K (11025U)
|
|
||||||
#define I2S_AUDIOFREQ_8K (8000U)
|
|
||||||
#define I2S_AUDIOFREQ_DEFAULT (2U)
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U)
|
|
||||||
#define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U)
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_CPOL_LOW (0x00000000U)
|
|
||||||
#define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_IT_TXE SPI_CR2_TXEIE
|
|
||||||
#define I2S_IT_RXNE SPI_CR2_RXNEIE
|
|
||||||
#define I2S_IT_ERR SPI_CR2_ERRIE
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_Flags_Definition I2S Flags Definition
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define I2S_FLAG_TXE SPI_SR_TXE
|
|
||||||
#define I2S_FLAG_RXNE SPI_SR_RXNE
|
|
||||||
|
|
||||||
#define I2S_FLAG_UDR SPI_SR_UDR
|
|
||||||
#define I2S_FLAG_OVR SPI_SR_OVR
|
|
||||||
#define I2S_FLAG_FRE SPI_SR_FRE
|
|
||||||
|
|
||||||
#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
|
|
||||||
#define I2S_FLAG_BSY SPI_SR_BSY
|
|
||||||
|
|
||||||
#define I2S_FLAG_MASK (SPI_SR_RXNE\
|
|
||||||
| SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_CHSIDE | SPI_SR_BSY)
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @defgroup I2S_Clock_Source I2S Clock Source Definition
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || defined(STM32F479xx)
|
|
||||||
#define I2S_CLOCK_PLL (0x00000000U)
|
|
||||||
#define I2S_CLOCK_EXTERNAL (0x00000001U)
|
|
||||||
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
|
|
||||||
STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
|
|
||||||
|
|
||||||
#if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
|
|
||||||
#define I2S_CLOCK_PLL (0x00000000U)
|
|
||||||
#define I2S_CLOCK_EXTERNAL (0x00000001U)
|
|
||||||
#define I2S_CLOCK_PLLR (0x00000002U)
|
|
||||||
#define I2S_CLOCK_PLLSRC (0x00000003U)
|
|
||||||
#endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
|
|
||||||
|
|
||||||
#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
|
|
||||||
#define I2S_CLOCK_PLLSRC (0x00000000U)
|
|
||||||
#define I2S_CLOCK_EXTERNAL (0x00000001U)
|
|
||||||
#define I2S_CLOCK_PLLR (0x00000002U)
|
|
||||||
#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported macros -----------------------------------------------------------*/
|
|
||||||
/** @defgroup I2S_Exported_macros I2S Exported Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @brief Reset I2S handle state
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
||||||
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
|
||||||
(__HANDLE__)->State = HAL_I2S_STATE_RESET; \
|
|
||||||
(__HANDLE__)->MspInitCallback = NULL; \
|
|
||||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
|
|
||||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
||||||
|
|
||||||
/** @brief Enable the specified SPI peripheral (in I2S mode).
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
|
|
||||||
|
|
||||||
/** @brief Disable the specified SPI peripheral (in I2S mode).
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
|
|
||||||
|
|
||||||
/** @brief Enable the specified I2S interrupts.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
|
||||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
|
||||||
* @arg I2S_IT_ERR: Error interrupt enable
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
|
|
||||||
|
|
||||||
/** @brief Disable the specified I2S interrupts.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
|
||||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
|
||||||
* @arg I2S_IT_ERR: Error interrupt enable
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
|
|
||||||
|
|
||||||
/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
|
|
||||||
* @param __INTERRUPT__ specifies the I2S interrupt source to check.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
|
||||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
|
||||||
* @arg I2S_IT_ERR: Error interrupt enable
|
|
||||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
|
|
||||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
|
||||||
|
|
||||||
/** @brief Checks whether the specified I2S flag is set or not.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @param __FLAG__ specifies the flag to check.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
|
|
||||||
* @arg I2S_FLAG_TXE: Transmit buffer empty flag
|
|
||||||
* @arg I2S_FLAG_UDR: Underrun flag
|
|
||||||
* @arg I2S_FLAG_OVR: Overrun flag
|
|
||||||
* @arg I2S_FLAG_FRE: Frame error flag
|
|
||||||
* @arg I2S_FLAG_CHSIDE: Channel Side flag
|
|
||||||
* @arg I2S_FLAG_BSY: Busy flag
|
|
||||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
|
||||||
|
|
||||||
/** @brief Clears the I2S OVR pending flag.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
|
|
||||||
__IO uint32_t tmpreg_ovr = 0x00U; \
|
|
||||||
tmpreg_ovr = (__HANDLE__)->Instance->DR; \
|
|
||||||
tmpreg_ovr = (__HANDLE__)->Instance->SR; \
|
|
||||||
UNUSED(tmpreg_ovr); \
|
|
||||||
}while(0U)
|
|
||||||
/** @brief Clears the I2S UDR pending flag.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
|
|
||||||
__IO uint32_t tmpreg_udr = 0x00U;\
|
|
||||||
tmpreg_udr = ((__HANDLE__)->Instance->SR);\
|
|
||||||
UNUSED(tmpreg_udr); \
|
|
||||||
}while(0U)
|
|
||||||
/** @brief Flush the I2S DR Register.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2S_FLUSH_RX_DR(__HANDLE__) do{\
|
|
||||||
__IO uint32_t tmpreg_dr = 0x00U;\
|
|
||||||
tmpreg_dr = ((__HANDLE__)->Instance->DR);\
|
|
||||||
UNUSED(tmpreg_dr); \
|
|
||||||
}while(0U)
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Include I2S Extension module */
|
|
||||||
#include "stm32f4xx_hal_i2s_ex.h"
|
|
||||||
|
|
||||||
/* Exported functions --------------------------------------------------------*/
|
|
||||||
/** @addtogroup I2S_Exported_Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup I2S_Exported_Functions_Group1
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Initialization/de-initialization functions ********************************/
|
|
||||||
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
|
|
||||||
HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
|
|
||||||
void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
|
|
||||||
void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
|
|
||||||
|
|
||||||
/* Callbacks Register/UnRegister functions ***********************************/
|
|
||||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
||||||
HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID,
|
|
||||||
pI2S_CallbackTypeDef pCallback);
|
|
||||||
HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
|
|
||||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup I2S_Exported_Functions_Group2
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* I/O operation functions ***************************************************/
|
|
||||||
/* Blocking mode: Polling */
|
|
||||||
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
|
|
||||||
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
|
|
||||||
|
|
||||||
/* Non-Blocking mode: Interrupt */
|
|
||||||
HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
|
|
||||||
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
|
|
||||||
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
|
|
||||||
|
|
||||||
/* Non-Blocking mode: DMA */
|
|
||||||
HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
|
|
||||||
HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
|
|
||||||
|
|
||||||
HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
|
|
||||||
HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
|
|
||||||
HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
|
|
||||||
|
|
||||||
/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
|
|
||||||
void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
|
|
||||||
void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
|
|
||||||
void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
|
|
||||||
void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
|
|
||||||
void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup I2S_Exported_Functions_Group3
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/* Peripheral Control and State functions ************************************/
|
|
||||||
HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
|
|
||||||
uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Private types -------------------------------------------------------------*/
|
|
||||||
/* Private variables ---------------------------------------------------------*/
|
|
||||||
/* Private constants ---------------------------------------------------------*/
|
|
||||||
/* Private macros ------------------------------------------------------------*/
|
|
||||||
/** @defgroup I2S_Private_Macros I2S Private Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @brief Check whether the specified SPI flag is set or not.
|
|
||||||
* @param __SR__ copy of I2S SR register.
|
|
||||||
* @param __FLAG__ specifies the flag to check.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
|
|
||||||
* @arg I2S_FLAG_TXE: Transmit buffer empty flag
|
|
||||||
* @arg I2S_FLAG_UDR: Underrun error flag
|
|
||||||
* @arg I2S_FLAG_OVR: Overrun flag
|
|
||||||
* @arg I2S_FLAG_CHSIDE: Channel side flag
|
|
||||||
* @arg I2S_FLAG_BSY: Busy flag
|
|
||||||
* @retval SET or RESET.
|
|
||||||
*/
|
|
||||||
#define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\
|
|
||||||
& ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
|
|
||||||
|
|
||||||
/** @brief Check whether the specified SPI Interrupt is set or not.
|
|
||||||
* @param __CR2__ copy of I2S CR2 register.
|
|
||||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
|
||||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
|
||||||
* @arg I2S_IT_ERR: Error interrupt enable
|
|
||||||
* @retval SET or RESET.
|
|
||||||
*/
|
|
||||||
#define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__)\
|
|
||||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
|
||||||
|
|
||||||
/** @brief Checks if I2S Mode parameter is in allowed range.
|
|
||||||
* @param __MODE__ specifies the I2S Mode.
|
|
||||||
* This parameter can be a value of @ref I2S_Mode
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \
|
|
||||||
((__MODE__) == I2S_MODE_SLAVE_RX) || \
|
|
||||||
((__MODE__) == I2S_MODE_MASTER_TX) || \
|
|
||||||
((__MODE__) == I2S_MODE_MASTER_RX))
|
|
||||||
|
|
||||||
#define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \
|
|
||||||
((__STANDARD__) == I2S_STANDARD_MSB) || \
|
|
||||||
((__STANDARD__) == I2S_STANDARD_LSB) || \
|
|
||||||
((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \
|
|
||||||
((__STANDARD__) == I2S_STANDARD_PCM_LONG))
|
|
||||||
|
|
||||||
#define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \
|
|
||||||
((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \
|
|
||||||
((__FORMAT__) == I2S_DATAFORMAT_24B) || \
|
|
||||||
((__FORMAT__) == I2S_DATAFORMAT_32B))
|
|
||||||
|
|
||||||
#define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \
|
|
||||||
((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
|
|
||||||
|
|
||||||
#define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \
|
|
||||||
((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \
|
|
||||||
((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
|
|
||||||
|
|
||||||
#define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
|
|
||||||
((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
|
|
||||||
|
|
||||||
/** @brief Checks if I2S Serial clock steady state parameter is in allowed range.
|
|
||||||
* @param __CPOL__ specifies the I2S serial clock steady state.
|
|
||||||
* This parameter can be a value of @ref I2S_Clock_Polarity
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \
|
|
||||||
((__CPOL__) == I2S_CPOL_HIGH))
|
|
||||||
|
|
||||||
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || defined(STM32F479xx)
|
|
||||||
#define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
|
|
||||||
((CLOCK) == I2S_CLOCK_PLL))
|
|
||||||
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
|
|
||||||
STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
|
|
||||||
|
|
||||||
#if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined (STM32F413xx) || defined(STM32F423xx)
|
|
||||||
#define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
|
|
||||||
((CLOCK) == I2S_CLOCK_PLL) ||\
|
|
||||||
((CLOCK) == I2S_CLOCK_PLLSRC) ||\
|
|
||||||
((CLOCK) == I2S_CLOCK_PLLR))
|
|
||||||
#endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
|
|
||||||
|
|
||||||
#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
|
|
||||||
#define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
|
|
||||||
((CLOCK) == I2S_CLOCK_PLLSRC) ||\
|
|
||||||
((CLOCK) == I2S_CLOCK_PLLR))
|
|
||||||
#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* STM32F4xx_HAL_I2S_H */
|
|
||||||
|
|
||||||
|
|
@ -1,183 +0,0 @@
|
||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file stm32f4xx_hal_i2s_ex.h
|
|
||||||
* @author MCD Application Team
|
|
||||||
* @brief Header file of I2S HAL module.
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2016 STMicroelectronics.
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
|
||||||
* in the root directory of this software component.
|
|
||||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
|
||||||
#ifndef STM32F4xx_HAL_I2S_EX_H
|
|
||||||
#define STM32F4xx_HAL_I2S_EX_H
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
|
||||||
#include "stm32f4xx_hal_def.h"
|
|
||||||
|
|
||||||
/** @addtogroup STM32F4xx_HAL_Driver
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#if defined(SPI_I2S_FULLDUPLEX_SUPPORT)
|
|
||||||
/** @addtogroup I2SEx I2SEx
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported types ------------------------------------------------------------*/
|
|
||||||
/* Exported constants --------------------------------------------------------*/
|
|
||||||
/* Exported macros -----------------------------------------------------------*/
|
|
||||||
/** @defgroup I2SEx_Exported_Macros I2S Extended Exported Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
|
|
||||||
|
|
||||||
/** @brief Enable or disable the specified I2SExt peripheral.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2SEXT_ENABLE(__HANDLE__) (I2SxEXT((__HANDLE__)->Instance)->I2SCFGR |= SPI_I2SCFGR_I2SE)
|
|
||||||
#define __HAL_I2SEXT_DISABLE(__HANDLE__) (I2SxEXT((__HANDLE__)->Instance)->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
|
|
||||||
|
|
||||||
/** @brief Enable or disable the specified I2SExt interrupts.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
|
||||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
|
||||||
* @arg I2S_IT_ERR: Error interrupt enable
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2SEXT_ENABLE_IT(__HANDLE__, __INTERRUPT__) (I2SxEXT((__HANDLE__)->Instance)->CR2 |= (__INTERRUPT__))
|
|
||||||
#define __HAL_I2SEXT_DISABLE_IT(__HANDLE__, __INTERRUPT__) (I2SxEXT((__HANDLE__)->Instance)->CR2 &= ~(__INTERRUPT__))
|
|
||||||
|
|
||||||
/** @brief Checks if the specified I2SExt interrupt source is enabled or disabled.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
|
|
||||||
* @param __INTERRUPT__ specifies the I2S interrupt source to check.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
|
||||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
|
||||||
* @arg I2S_IT_ERR: Error interrupt enable
|
|
||||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
|
||||||
*/
|
|
||||||
#define __HAL_I2SEXT_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((I2SxEXT((__HANDLE__)->Instance)->CR2\
|
|
||||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
|
||||||
|
|
||||||
/** @brief Checks whether the specified I2SExt flag is set or not.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @param __FLAG__ specifies the flag to check.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
|
|
||||||
* @arg I2S_FLAG_TXE: Transmit buffer empty flag
|
|
||||||
* @arg I2S_FLAG_UDR: Underrun flag
|
|
||||||
* @arg I2S_FLAG_OVR: Overrun flag
|
|
||||||
* @arg I2S_FLAG_FRE: Frame error flag
|
|
||||||
* @arg I2S_FLAG_CHSIDE: Channel Side flag
|
|
||||||
* @arg I2S_FLAG_BSY: Busy flag
|
|
||||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
|
||||||
*/
|
|
||||||
#define __HAL_I2SEXT_GET_FLAG(__HANDLE__, __FLAG__) (((I2SxEXT((__HANDLE__)->Instance)->SR) & (__FLAG__)) == (__FLAG__))
|
|
||||||
|
|
||||||
/** @brief Clears the I2SExt OVR pending flag.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2SEXT_CLEAR_OVRFLAG(__HANDLE__) do{ \
|
|
||||||
__IO uint32_t tmpreg_ovr = 0x00U; \
|
|
||||||
tmpreg_ovr = I2SxEXT((__HANDLE__)->Instance)->DR;\
|
|
||||||
tmpreg_ovr = I2SxEXT((__HANDLE__)->Instance)->SR;\
|
|
||||||
UNUSED(tmpreg_ovr); \
|
|
||||||
}while(0U)
|
|
||||||
/** @brief Clears the I2SExt UDR pending flag.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2SEXT_CLEAR_UDRFLAG(__HANDLE__) do{ \
|
|
||||||
__IO uint32_t tmpreg_udr = 0x00U; \
|
|
||||||
tmpreg_udr = I2SxEXT((__HANDLE__)->Instance)->SR;\
|
|
||||||
UNUSED(tmpreg_udr); \
|
|
||||||
}while(0U)
|
|
||||||
/** @brief Flush the I2S and I2SExt DR Registers.
|
|
||||||
* @param __HANDLE__ specifies the I2S Handle.
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2SEXT_FLUSH_RX_DR(__HANDLE__) do{ \
|
|
||||||
__IO uint32_t tmpreg_dr = 0x00U; \
|
|
||||||
tmpreg_dr = I2SxEXT((__HANDLE__)->Instance)->DR; \
|
|
||||||
tmpreg_dr = ((__HANDLE__)->Instance->DR); \
|
|
||||||
UNUSED(tmpreg_dr); \
|
|
||||||
}while(0U)
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Exported functions --------------------------------------------------------*/
|
|
||||||
/** @addtogroup I2SEx_Exported_Functions I2S Extended Exported Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup I2SEx_Exported_Functions_Group1 I2S Extended IO operation functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Extended features functions *************************************************/
|
|
||||||
/* Blocking mode: Polling */
|
|
||||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData,
|
|
||||||
uint16_t Size, uint32_t Timeout);
|
|
||||||
/* Non-Blocking mode: Interrupt */
|
|
||||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData,
|
|
||||||
uint16_t Size);
|
|
||||||
/* Non-Blocking mode: DMA */
|
|
||||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData,
|
|
||||||
uint16_t Size);
|
|
||||||
/* I2S IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
|
||||||
void HAL_I2SEx_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s);
|
|
||||||
void HAL_I2SEx_TxRxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
|
|
||||||
void HAL_I2SEx_TxRxCpltCallback(I2S_HandleTypeDef *hi2s);
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/* Private types -------------------------------------------------------------*/
|
|
||||||
/* Private variables ---------------------------------------------------------*/
|
|
||||||
/* Private constants ---------------------------------------------------------*/
|
|
||||||
/* Private macros ------------------------------------------------------------*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Private functions ---------------------------------------------------------*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* STM32F4xx_HAL_I2S_EX_H */
|
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
117
test1.ioc
117
test1.ioc
|
|
@ -10,23 +10,16 @@ ADC1.master=1
|
||||||
CAD.formats=
|
CAD.formats=
|
||||||
CAD.pinconfig=
|
CAD.pinconfig=
|
||||||
CAD.provider=
|
CAD.provider=
|
||||||
|
ETH.IPParameters=MediaInterface
|
||||||
|
ETH.MediaInterface=HAL_ETH_RMII_MODE
|
||||||
File.Version=6
|
File.Version=6
|
||||||
GPIO.groupedBy=Group By Peripherals
|
GPIO.groupedBy=Group By Peripherals
|
||||||
I2S2.AudioFreq=I2S_AUDIOFREQ_48K
|
|
||||||
I2S2.DataFormat=I2S_DATAFORMAT_16B
|
|
||||||
I2S2.ErrorAudioFreq=-0.79 %
|
|
||||||
I2S2.FullDuplexMode=I2S_FULLDUPLEXMODE_DISABLE
|
|
||||||
I2S2.IPParameters=Instance,VirtualMode,FullDuplexMode,RealAudioFreq,ErrorAudioFreq,Mode,DataFormat,AudioFreq
|
|
||||||
I2S2.Instance=SPI$Index
|
|
||||||
I2S2.Mode=I2S_MODE_MASTER_RX
|
|
||||||
I2S2.RealAudioFreq=47.619 KHz
|
|
||||||
I2S2.VirtualMode=I2S_MODE_MASTER
|
|
||||||
KeepUserPlacement=false
|
KeepUserPlacement=false
|
||||||
Mcu.CPN=STM32F407VGT6
|
Mcu.CPN=STM32F407VGT6
|
||||||
Mcu.Family=STM32F4
|
Mcu.Family=STM32F4
|
||||||
Mcu.IP0=ADC1
|
Mcu.IP0=ADC1
|
||||||
Mcu.IP1=I2C1
|
Mcu.IP1=ETH
|
||||||
Mcu.IP2=I2S2
|
Mcu.IP2=I2C1
|
||||||
Mcu.IP3=NVIC
|
Mcu.IP3=NVIC
|
||||||
Mcu.IP4=RCC
|
Mcu.IP4=RCC
|
||||||
Mcu.IP5=SPI1
|
Mcu.IP5=SPI1
|
||||||
|
|
@ -35,39 +28,47 @@ Mcu.IP7=TIM2
|
||||||
Mcu.IPNb=8
|
Mcu.IPNb=8
|
||||||
Mcu.Name=STM32F407V(E-G)Tx
|
Mcu.Name=STM32F407V(E-G)Tx
|
||||||
Mcu.Package=LQFP100
|
Mcu.Package=LQFP100
|
||||||
Mcu.Pin0=PC3
|
Mcu.Pin0=PC1
|
||||||
Mcu.Pin1=PA0-WKUP
|
Mcu.Pin1=PC3
|
||||||
Mcu.Pin10=PE15
|
Mcu.Pin10=PE7
|
||||||
Mcu.Pin11=PB10
|
Mcu.Pin11=PE10
|
||||||
Mcu.Pin12=PB12
|
Mcu.Pin12=PE11
|
||||||
Mcu.Pin13=PD11
|
Mcu.Pin13=PE12
|
||||||
Mcu.Pin14=PD12
|
Mcu.Pin14=PE13
|
||||||
Mcu.Pin15=PD13
|
Mcu.Pin15=PE14
|
||||||
Mcu.Pin16=PD14
|
Mcu.Pin16=PE15
|
||||||
Mcu.Pin17=PD15
|
Mcu.Pin17=PB10
|
||||||
Mcu.Pin18=PC6
|
Mcu.Pin18=PB11
|
||||||
Mcu.Pin19=PC8
|
Mcu.Pin19=PB12
|
||||||
Mcu.Pin2=PA5
|
Mcu.Pin2=PA0-WKUP
|
||||||
Mcu.Pin20=PC9
|
Mcu.Pin20=PB13
|
||||||
Mcu.Pin21=PA15
|
Mcu.Pin21=PD11
|
||||||
Mcu.Pin22=PC11
|
Mcu.Pin22=PD12
|
||||||
Mcu.Pin23=PD4
|
Mcu.Pin23=PD13
|
||||||
Mcu.Pin24=PD7
|
Mcu.Pin24=PD14
|
||||||
Mcu.Pin25=PB4
|
Mcu.Pin25=PD15
|
||||||
Mcu.Pin26=PB5
|
Mcu.Pin26=PC6
|
||||||
Mcu.Pin27=PB6
|
Mcu.Pin27=PC8
|
||||||
Mcu.Pin28=PB7
|
Mcu.Pin28=PC9
|
||||||
Mcu.Pin29=PB9
|
Mcu.Pin29=PA15
|
||||||
Mcu.Pin3=PB1
|
Mcu.Pin3=PA1
|
||||||
Mcu.Pin30=VP_SYS_VS_Systick
|
Mcu.Pin30=PC11
|
||||||
Mcu.Pin31=VP_TIM2_VS_ClockSourceINT
|
Mcu.Pin31=PD4
|
||||||
Mcu.Pin4=PE7
|
Mcu.Pin32=PD7
|
||||||
Mcu.Pin5=PE10
|
Mcu.Pin33=PB4
|
||||||
Mcu.Pin6=PE11
|
Mcu.Pin34=PB5
|
||||||
Mcu.Pin7=PE12
|
Mcu.Pin35=PB6
|
||||||
Mcu.Pin8=PE13
|
Mcu.Pin36=PB7
|
||||||
Mcu.Pin9=PE14
|
Mcu.Pin37=PB9
|
||||||
Mcu.PinsNb=32
|
Mcu.Pin38=VP_SYS_VS_Systick
|
||||||
|
Mcu.Pin39=VP_TIM2_VS_ClockSourceINT
|
||||||
|
Mcu.Pin4=PA2
|
||||||
|
Mcu.Pin5=PA5
|
||||||
|
Mcu.Pin6=PA7
|
||||||
|
Mcu.Pin7=PC4
|
||||||
|
Mcu.Pin8=PC5
|
||||||
|
Mcu.Pin9=PB1
|
||||||
|
Mcu.PinsNb=40
|
||||||
Mcu.ThirdPartyNb=0
|
Mcu.ThirdPartyNb=0
|
||||||
Mcu.UserConstants=
|
Mcu.UserConstants=
|
||||||
Mcu.UserName=STM32F407VGTx
|
Mcu.UserName=STM32F407VGTx
|
||||||
|
|
@ -86,17 +87,26 @@ NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
|
||||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
PA0-WKUP.Locked=true
|
PA0-WKUP.Locked=true
|
||||||
PA0-WKUP.Signal=GPIO_Input
|
PA0-WKUP.Signal=GPIO_Input
|
||||||
|
PA1.Mode=RMII
|
||||||
|
PA1.Signal=ETH_REF_CLK
|
||||||
PA15.Locked=true
|
PA15.Locked=true
|
||||||
PA15.Signal=GPIO_Input
|
PA15.Signal=GPIO_Input
|
||||||
|
PA2.Mode=RMII
|
||||||
|
PA2.Signal=ETH_MDIO
|
||||||
PA5.Mode=Full_Duplex_Master
|
PA5.Mode=Full_Duplex_Master
|
||||||
PA5.Signal=SPI1_SCK
|
PA5.Signal=SPI1_SCK
|
||||||
|
PA7.Mode=RMII
|
||||||
|
PA7.Signal=ETH_CRS_DV
|
||||||
PB1.Locked=true
|
PB1.Locked=true
|
||||||
PB1.Signal=ADCx_IN9
|
PB1.Signal=ADCx_IN9
|
||||||
PB10.Locked=true
|
PB10.Locked=true
|
||||||
PB10.Mode=Half_Duplex_Master
|
PB10.Signal=GPIO_Output
|
||||||
PB10.Signal=I2S2_CK
|
PB11.Mode=RMII
|
||||||
PB12.Mode=Half_Duplex_Master
|
PB11.Signal=ETH_TX_EN
|
||||||
PB12.Signal=I2S2_WS
|
PB12.Mode=RMII
|
||||||
|
PB12.Signal=ETH_TXD0
|
||||||
|
PB13.Mode=RMII
|
||||||
|
PB13.Signal=ETH_TXD1
|
||||||
PB4.Locked=true
|
PB4.Locked=true
|
||||||
PB4.Mode=Full_Duplex_Master
|
PB4.Mode=Full_Duplex_Master
|
||||||
PB4.Signal=SPI1_MISO
|
PB4.Signal=SPI1_MISO
|
||||||
|
|
@ -110,11 +120,16 @@ PB7.Signal=GPIO_Output
|
||||||
PB9.Locked=true
|
PB9.Locked=true
|
||||||
PB9.Mode=I2C
|
PB9.Mode=I2C
|
||||||
PB9.Signal=I2C1_SDA
|
PB9.Signal=I2C1_SDA
|
||||||
|
PC1.Mode=RMII
|
||||||
|
PC1.Signal=ETH_MDC
|
||||||
PC11.Locked=true
|
PC11.Locked=true
|
||||||
PC11.Signal=GPIO_Input
|
PC11.Signal=GPIO_Input
|
||||||
PC3.Locked=true
|
PC3.Locked=true
|
||||||
PC3.Mode=Half_Duplex_Master
|
PC3.Signal=GPIO_Input
|
||||||
PC3.Signal=I2S2_SD
|
PC4.Mode=RMII
|
||||||
|
PC4.Signal=ETH_RXD0
|
||||||
|
PC5.Mode=RMII
|
||||||
|
PC5.Signal=ETH_RXD1
|
||||||
PC6.Locked=true
|
PC6.Locked=true
|
||||||
PC6.Signal=GPIO_Input
|
PC6.Signal=GPIO_Input
|
||||||
PC8.Locked=true
|
PC8.Locked=true
|
||||||
|
|
@ -182,7 +197,7 @@ ProjectManager.ToolChainLocation=
|
||||||
ProjectManager.UAScriptAfterPath=
|
ProjectManager.UAScriptAfterPath=
|
||||||
ProjectManager.UAScriptBeforePath=
|
ProjectManager.UAScriptBeforePath=
|
||||||
ProjectManager.UnderRoot=true
|
ProjectManager.UnderRoot=true
|
||||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_TIM2_Init-TIM2-false-HAL-true,7-MX_I2S2_Init-I2S2-false-HAL-true
|
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_TIM2_Init-TIM2-false-HAL-true,7-MX_ETH_Init-ETH-false-HAL-true
|
||||||
RCC.48MHZClocksFreq_Value=32000000
|
RCC.48MHZClocksFreq_Value=32000000
|
||||||
RCC.AHBFreq_Value=32000000
|
RCC.AHBFreq_Value=32000000
|
||||||
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue