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[KSZ8081RND] remove the bloated HAL MAC driver, simplify configuration and communication process

This commit is contained in:
ІО-23 Шмуляр Олег 2025-05-10 13:31:55 +03:00
parent 3d2f391749
commit 72f04af872
9 changed files with 68 additions and 5559 deletions
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4
.mxproject
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File diff suppressed because one or more lines are too long

6
Core/Inc/KSZ8081RND.h
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@ -4,10 +4,8 @@
int KSZ8081RND_run_test(void); int KSZ8081RND_run_test(void);
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg, int ReadRegister(uint32_t reg, uint16_t *value);
uint32_t *pRegValue); int WriteRegister(uint32_t reg, uint16_t value);
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
uint32_t RegValue);
#endif #endif

4
Core/Inc/stm32f4xx_hal_conf.h
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@ -45,7 +45,7 @@
/* #define HAL_DAC_MODULE_ENABLED */ /* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */ /* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_DMA2D_MODULE_ENABLED */
#define HAL_ETH_MODULE_ENABLED /* #define HAL_ETH_MODULE_ENABLED */
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */ /* #define HAL_ETH_LEGACY_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */
@ -214,7 +214,7 @@
#define MAC_ADDR5 0U #define MAC_ADDR5 0U
/* Definition of the Ethernet driver buffers size and count */ /* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE 1524 /* buffer size for receive */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ #define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */

81
Core/Src/KSZ8081RND.c
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@ -50,51 +50,23 @@ int KSZ8081RND_run_test(void)
HAL_Delay(10); HAL_Delay(10);
// enable PLL and REF_CLK output from KSZ8081RND // enable PLL and REF_CLK output from KSZ8081RND
ETH_HandleTypeDef heth; uint16_t r;
heth.Instance = ETH;
heth.Init.MediaInterface = HAL_ETH_RMII_MODE;
HAL_StatusTypeDef s; if (ReadRegister(0x1F, &r)) {
uint32_t r; display_write_data_seq("READ ERROR");
s = HAL_ETH_ReadPHYRegister(&heth, 0x0, 0x1F, &r);
switch (s) {
case HAL_OK:
// ok
break;
case HAL_ERROR:
display_write_data_seq("R ERROR");
return 1;
case HAL_BUSY:
display_write_data_seq("R BUSY");
return 1;
case HAL_TIMEOUT:
display_write_data_seq("R TIMEOUT");
return 1; return 1;
} }
r |= (1 << 7); r |= (1 << 7);
s = HAL_ETH_WritePHYRegister(&heth, 0x0, 0x1F, r);
switch (s) { if (WriteRegister(0x1F, r)) {
case HAL_OK: display_write_data_seq("WRITE ERROR");
// ok
break;
case HAL_ERROR:
display_write_data_seq("W ERROR");
return 1;
case HAL_BUSY:
display_write_data_seq("W BUSY");
return 1;
case HAL_TIMEOUT:
display_write_data_seq("W TIMEOUT");
return 1; return 1;
} }
// enable RMII interface // switch to RMII interface
__HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_RCC_SYSCFG_CLK_ENABLE();
SYSCFG->PMC |= (1 << 23);
SYSCFG->PMC &= ~(SYSCFG_PMC_MII_RMII_SEL);
SYSCFG->PMC |= (uint32_t)heth.Init.MediaInterface;
(void)SYSCFG->PMC; (void)SYSCFG->PMC;
// check if software reset happens on MAC // check if software reset happens on MAC
@ -107,59 +79,52 @@ int KSZ8081RND_run_test(void)
if (TIM2->CNT > (500000 << 4)) { if (TIM2->CNT > (500000 << 4)) {
// MAC software reset timed out -> no REF_CLK output? // MAC software reset timed out -> no REF_CLK output?
HAL_TIM_Base_Stop(&htim2); HAL_TIM_Base_Stop(&htim2);
display_write_data_seq("SR ERROR");
return 1; return 1;
} }
} }
HAL_TIM_Base_Stop(&htim2); HAL_TIM_Base_Stop(&htim2);
display_write_data_seq("OK");
return 0; return 0;
} }
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t *pRegValue) int ReadRegister(uint32_t reg, uint16_t *value)
{ {
uint32_t tmpreg1; uint16_t tmpreg1;
uint32_t tickstart; uint32_t tickstart;
tmpreg1 = heth->Instance->MACMIIAR; tmpreg1 = (reg << 6);
tmpreg1 &= ~ETH_MACMIIAR_CR_MASK; tmpreg1 |= 1;
ETH->MACMIIAR = tmpreg1;
tmpreg1 |= ((PHYAddr << 11U) & ETH_MACMIIAR_PA);
tmpreg1 |= (((uint32_t)PHYReg << 6U) & ETH_MACMIIAR_MR);
tmpreg1 &= ~ETH_MACMIIAR_MW;
tmpreg1 |= ETH_MACMIIAR_MB;
heth->Instance->MACMIIAR = tmpreg1;
tickstart = HAL_GetTick(); tickstart = HAL_GetTick();
while ((tmpreg1 & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB) while ((tmpreg1 & 1) == ETH_MACMIIAR_MB)
{ {
if ((HAL_GetTick() - tickstart) > PHY_READ_TO) if ((HAL_GetTick() - tickstart) > PHY_READ_TO)
{ {
return HAL_ERROR; return HAL_ERROR;
} }
tmpreg1 = heth->Instance->MACMIIAR; tmpreg1 = ETH->MACMIIAR;
} }
*pRegValue = (uint16_t)(heth->Instance->MACMIIDR); *value = (uint16_t) (ETH->MACMIIDR);
return HAL_OK; return HAL_OK;
} }
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t RegValue) int WriteRegister(uint32_t reg, uint16_t value)
{ {
uint32_t tmpreg1; uint32_t tmpreg1;
uint32_t tickstart; uint32_t tickstart;
tmpreg1 = heth->Instance->MACMIIAR; tmpreg1 = (reg << 6);
tmpreg1 &= ~ETH_MACMIIAR_CR_MASK;
tmpreg1 |= (((uint32_t)PHYReg << 6U) & (0x1FUL << (6U)));
tmpreg1 |= 3; tmpreg1 |= 3;
heth->Instance->MACMIIDR = (uint16_t)RegValue; ETH->MACMIIDR = value;
heth->Instance->MACMIIAR = tmpreg1; ETH->MACMIIAR = tmpreg1;
tickstart = HAL_GetTick(); tickstart = HAL_GetTick();
@ -170,7 +135,7 @@ HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32
return HAL_ERROR; return HAL_ERROR;
} }
tmpreg1 = heth->Instance->MACMIIAR; tmpreg1 = ETH->MACMIIAR;
} }
return HAL_OK; return HAL_OK;

59
Core/Src/main.c
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@ -18,7 +18,6 @@
/* USER CODE END Header */ /* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "main.h" #include "main.h"
#include "string.h"
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
@ -68,15 +67,8 @@
/* USER CODE END PM */ /* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
ETH_TxPacketConfig TxConfig;
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc1;
ETH_HandleTypeDef heth;
I2C_HandleTypeDef hi2c1; I2C_HandleTypeDef hi2c1;
SPI_HandleTypeDef hspi1; SPI_HandleTypeDef hspi1;
@ -126,7 +118,6 @@ static void MX_ADC1_Init(void);
static void MX_I2C1_Init(void); static void MX_I2C1_Init(void);
static void MX_SPI1_Init(void); static void MX_SPI1_Init(void);
static void MX_TIM2_Init(void); static void MX_TIM2_Init(void);
static void MX_ETH_Init(void);
/* USER CODE BEGIN PFP */ /* USER CODE BEGIN PFP */
/* USER CODE END PFP */ /* USER CODE END PFP */
@ -169,7 +160,6 @@ int main(void)
MX_I2C1_Init(); MX_I2C1_Init();
MX_SPI1_Init(); MX_SPI1_Init();
MX_TIM2_Init(); MX_TIM2_Init();
MX_ETH_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
GPIOD->BSRR = 0x1000; GPIOD->BSRR = 0x1000;
@ -383,55 +373,6 @@ static void MX_ADC1_Init(void)
} }
/**
* @brief ETH Initialization Function
* @param None
* @retval None
*/
static void MX_ETH_Init(void)
{
/* USER CODE BEGIN ETH_Init 0 */
/* USER CODE END ETH_Init 0 */
static uint8_t MACAddr[6];
/* USER CODE BEGIN ETH_Init 1 */
/* USER CODE END ETH_Init 1 */
heth.Instance = ETH;
MACAddr[0] = 0x00;
MACAddr[1] = 0x80;
MACAddr[2] = 0xE1;
MACAddr[3] = 0x00;
MACAddr[4] = 0x00;
MACAddr[5] = 0x00;
heth.Init.MACAddr = &MACAddr[0];
heth.Init.MediaInterface = HAL_ETH_RMII_MODE;
heth.Init.TxDesc = DMATxDscrTab;
heth.Init.RxDesc = DMARxDscrTab;
heth.Init.RxBuffLen = 1524;
/* USER CODE BEGIN MACADDRESS */
/* USER CODE END MACADDRESS */
if (HAL_ETH_Init(&heth) != HAL_OK)
{
Error_Handler();
}
memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
/* USER CODE BEGIN ETH_Init 2 */
/* USER CODE END ETH_Init 2 */
}
/** /**
* @brief I2C1 Initialization Function * @brief I2C1 Initialization Function
* @param None * @param None

110
Core/Src/stm32f4xx_hal_msp.c
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@ -140,116 +140,6 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
} }
/**
* @brief ETH MSP Initialization
* This function configures the hardware resources used in this example
* @param heth: ETH handle pointer
* @retval None
*/
void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(heth->Instance==ETH)
{
/* USER CODE BEGIN ETH_MspInit 0 */
/* USER CODE END ETH_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ETH_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**ETH GPIO Configuration
PC1 ------> ETH_MDC
PA1 ------> ETH_REF_CLK
PA2 ------> ETH_MDIO
PA7 ------> ETH_CRS_DV
PC4 ------> ETH_RXD0
PC5 ------> ETH_RXD1
PB11 ------> ETH_TX_EN
PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1
*/
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN ETH_MspInit 1 */
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_10, GPIO_PIN_RESET);
HAL_Delay(10);
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_7, GPIO_PIN_SET);
HAL_Delay(10);
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_10, GPIO_PIN_SET);
HAL_Delay(10);
uint32_t r;
HAL_ETH_ReadPHYRegister(heth, 0x0, 0x1F, &r);
r |= (1 << 7);
HAL_ETH_WritePHYRegister(heth, 0x0, 0x1F, r);
/* USER CODE END ETH_MspInit 1 */
}
}
/**
* @brief ETH MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param heth: ETH handle pointer
* @retval None
*/
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
{
if(heth->Instance==ETH)
{
/* USER CODE BEGIN ETH_MspDeInit 0 */
/* USER CODE END ETH_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ETH_CLK_DISABLE();
/**ETH GPIO Configuration
PC1 ------> ETH_MDC
PA1 ------> ETH_REF_CLK
PA2 ------> ETH_MDIO
PA7 ------> ETH_CRS_DV
PC4 ------> ETH_RXD0
PC5 ------> ETH_RXD1
PB11 ------> ETH_TX_EN
PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
/* USER CODE BEGIN ETH_MspDeInit 1 */
/* USER CODE END ETH_MspDeInit 1 */
}
}
/** /**
* @brief I2C MSP Initialization * @brief I2C MSP Initialization
* This function configures the hardware resources used in this example * This function configures the hardware resources used in this example

2017
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h
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File diff suppressed because it is too large Load Diff

3238
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.c
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File diff suppressed because it is too large Load Diff

108
test1.ioc
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@ -10,65 +10,53 @@ ADC1.master=1
CAD.formats= CAD.formats=
CAD.pinconfig= CAD.pinconfig=
CAD.provider= CAD.provider=
ETH.IPParameters=MediaInterface
ETH.MediaInterface=HAL_ETH_RMII_MODE
File.Version=6 File.Version=6
GPIO.groupedBy=Group By Peripherals GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false KeepUserPlacement=false
Mcu.CPN=STM32F407VGT6 Mcu.CPN=STM32F407VGT6
Mcu.Family=STM32F4 Mcu.Family=STM32F4
Mcu.IP0=ADC1 Mcu.IP0=ADC1
Mcu.IP1=ETH Mcu.IP1=I2C1
Mcu.IP2=I2C1 Mcu.IP2=NVIC
Mcu.IP3=NVIC Mcu.IP3=RCC
Mcu.IP4=RCC Mcu.IP4=SPI1
Mcu.IP5=SPI1 Mcu.IP5=SYS
Mcu.IP6=SYS Mcu.IP6=TIM2
Mcu.IP7=TIM2 Mcu.IPNb=7
Mcu.IPNb=8
Mcu.Name=STM32F407V(E-G)Tx Mcu.Name=STM32F407V(E-G)Tx
Mcu.Package=LQFP100 Mcu.Package=LQFP100
Mcu.Pin0=PC1 Mcu.Pin0=PC3
Mcu.Pin1=PC3 Mcu.Pin1=PA0-WKUP
Mcu.Pin10=PE7 Mcu.Pin10=PE15
Mcu.Pin11=PE10 Mcu.Pin11=PB10
Mcu.Pin12=PE11 Mcu.Pin12=PD11
Mcu.Pin13=PE12 Mcu.Pin13=PD12
Mcu.Pin14=PE13 Mcu.Pin14=PD13
Mcu.Pin15=PE14 Mcu.Pin15=PD14
Mcu.Pin16=PE15 Mcu.Pin16=PD15
Mcu.Pin17=PB10 Mcu.Pin17=PC6
Mcu.Pin18=PB11 Mcu.Pin18=PC8
Mcu.Pin19=PB12 Mcu.Pin19=PC9
Mcu.Pin2=PA0-WKUP Mcu.Pin2=PA5
Mcu.Pin20=PB13 Mcu.Pin20=PA15
Mcu.Pin21=PD11 Mcu.Pin21=PC11
Mcu.Pin22=PD12 Mcu.Pin22=PD4
Mcu.Pin23=PD13 Mcu.Pin23=PD7
Mcu.Pin24=PD14 Mcu.Pin24=PB4
Mcu.Pin25=PD15 Mcu.Pin25=PB5
Mcu.Pin26=PC6 Mcu.Pin26=PB6
Mcu.Pin27=PC8 Mcu.Pin27=PB7
Mcu.Pin28=PC9 Mcu.Pin28=PB9
Mcu.Pin29=PA15 Mcu.Pin29=VP_SYS_VS_Systick
Mcu.Pin3=PA1 Mcu.Pin3=PB1
Mcu.Pin30=PC11 Mcu.Pin30=VP_TIM2_VS_ClockSourceINT
Mcu.Pin31=PD4 Mcu.Pin4=PE7
Mcu.Pin32=PD7 Mcu.Pin5=PE10
Mcu.Pin33=PB4 Mcu.Pin6=PE11
Mcu.Pin34=PB5 Mcu.Pin7=PE12
Mcu.Pin35=PB6 Mcu.Pin8=PE13
Mcu.Pin36=PB7 Mcu.Pin9=PE14
Mcu.Pin37=PB9 Mcu.PinsNb=31
Mcu.Pin38=VP_SYS_VS_Systick
Mcu.Pin39=VP_TIM2_VS_ClockSourceINT
Mcu.Pin4=PA2
Mcu.Pin5=PA5
Mcu.Pin6=PA7
Mcu.Pin7=PC4
Mcu.Pin8=PC5
Mcu.Pin9=PB1
Mcu.PinsNb=40
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32F407VGTx Mcu.UserName=STM32F407VGTx
@ -87,28 +75,16 @@ NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA0-WKUP.Locked=true PA0-WKUP.Locked=true
PA0-WKUP.Signal=GPIO_Input PA0-WKUP.Signal=GPIO_Input
PA1.Mode=RMII
PA1.Signal=ETH_REF_CLK
PA15.Locked=true PA15.Locked=true
PA15.Signal=GPIO_Input PA15.Signal=GPIO_Input
PA2.Mode=RMII
PA2.Signal=ETH_MDIO
PA5.Mode=Full_Duplex_Master PA5.Mode=Full_Duplex_Master
PA5.Signal=SPI1_SCK PA5.Signal=SPI1_SCK
PA7.Mode=RMII
PA7.Signal=ETH_CRS_DV
PB1.Locked=true PB1.Locked=true
PB1.Signal=ADCx_IN9 PB1.Signal=ADCx_IN9
PB10.GPIOParameters=GPIO_Speed PB10.GPIOParameters=GPIO_Speed
PB10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH PB10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PB10.Locked=true PB10.Locked=true
PB10.Signal=GPIO_Output PB10.Signal=GPIO_Output
PB11.Mode=RMII
PB11.Signal=ETH_TX_EN
PB12.Mode=RMII
PB12.Signal=ETH_TXD0
PB13.Mode=RMII
PB13.Signal=ETH_TXD1
PB4.Locked=true PB4.Locked=true
PB4.Mode=Full_Duplex_Master PB4.Mode=Full_Duplex_Master
PB4.Signal=SPI1_MISO PB4.Signal=SPI1_MISO
@ -122,16 +98,10 @@ PB7.Signal=GPIO_Output
PB9.Locked=true PB9.Locked=true
PB9.Mode=I2C PB9.Mode=I2C
PB9.Signal=I2C1_SDA PB9.Signal=I2C1_SDA
PC1.Mode=RMII
PC1.Signal=ETH_MDC
PC11.Locked=true PC11.Locked=true
PC11.Signal=GPIO_Input PC11.Signal=GPIO_Input
PC3.Locked=true PC3.Locked=true
PC3.Signal=GPIO_Input PC3.Signal=GPIO_Input
PC4.Mode=RMII
PC4.Signal=ETH_RXD0
PC5.Mode=RMII
PC5.Signal=ETH_RXD1
PC6.Locked=true PC6.Locked=true
PC6.Signal=GPIO_Input PC6.Signal=GPIO_Input
PC8.Locked=true PC8.Locked=true