258 lines
15 KiB
Plaintext
258 lines
15 KiB
Plaintext
12. Directives of the assembler.
|
|
══════════════════════════════
|
|
|
|
The Directives does not translate in executive codes. They serve as pointers
|
|
of assembler on that or other action which it must do with operands, attached to
|
|
the directive. We shall consider the directives, supported by assembler
|
|
"COMANDOR" and rules of the work with them:
|
|
Following directives will are considered In this part:
|
|
|
|
12.1. Directive of including in translated text INCLUDE.
|
|
12.2. Directive of accomodations of the executive code ORG.
|
|
12.3. Directive of input of mark and(or) of the correspondence to EQU.
|
|
12.4. Directive of input of macros.
|
|
12.5. Directive of input of values of determined cells of memory DW.
|
|
12.6. Directive of installation of internal registers of complex ACCEPT.
|
|
12.7. Directive of input of switchings of the conditions for BMM LINK.
|
|
|
|
12.1. The Directive of the including of translated text INCLUDE.
|
|
────────────────────────────────────────────────────────────
|
|
|
|
INCLUDE (+) - a directive of the insertion in translating program of the text
|
|
from indicated file. The File assigned in directive must be in the same
|
|
directory, as translating file. The Example:
|
|
|
|
include macro.lib
|
|
+ routine
|
|
|
|
12.2. Directive of the accomodation of the executive code ORG.
|
|
────────────────────────────────────────────────────────────
|
|
|
|
ORG ($) - a directive of the accomodation of the executive code indicates to
|
|
the assembler on that nearest following after directive microinstruction will
|
|
be situated in memories of the microinstructions by adress, specified after
|
|
directive ORG. The Address must not exceed the last addressed field of the
|
|
microinstructions. For instance:
|
|
|
|
org 010h
|
|
org start
|
|
$ 100
|
|
|
|
12.3.Directive of input of the mark and(or) of the correspondence to EQU.
|
|
──────────────────────────────────────────────────────────────────────
|
|
|
|
EQU (=) - a directive of the inputting of the marks and correspondence need
|
|
for You if You want to change any numeric constant or standard mnemonics of the
|
|
assembler on clearer equivalent for You. The inputting of the mark is realized
|
|
by writing the keyword EQU(=), name of the mark and by operator of division ":"
|
|
of equivalent of the mark.
|
|
For instance:
|
|
|
|
equ start : 10
|
|
= add :add equ op1 : r1
|
|
equ op2 : 10
|
|
$ start
|
|
{add op1,op2;}
|
|
|
|
12.4. Directive of the inputting of the macros MACRO.
|
|
─────────────────────────────────────────────────
|
|
|
|
MACRO (#) - a directive of the inputting of macros allows You to construct
|
|
your own commands and use them in the same way easy, as standard commands of
|
|
the assembler. The Directive of macros is assigned by keyword MACRO, name of
|
|
macro with enumeration of all its formal parameters and, by operator of division
|
|
":" - the macro, executed in the manner of standard command of the assembler
|
|
that is to say, inside of operators "{ }".
|
|
For instance:
|
|
|
|
MACRO inc reg :{ add reg, reg, z, not z; }
|
|
# JC cond, addr:{ Field Const addr, 0; CJP cond; }
|
|
# dec_RgQ :{ sub Rq, Rq, z, not z; }
|
|
|
|
The Name of macro becomes usual standard mnemonics for translator with all
|
|
spreading rights on it. The Names of formal operands of macro can`t be reserved
|
|
mnemonics. In program a macro is assigned by its name and, real operands
|
|
enumerated through comma in the same order, as it was inputed.
|
|
For instance:
|
|
|
|
{ inc r4; jc not co, start;}
|
|
.......
|
|
|
|
start {dec_RgQ;}
|
|
|
|
12.5. Directive of the input of values of determined cells of memory DW.
|
|
────────────────────────────────────────────────────────────────────
|
|
|
|
DW - directive of the inputting of anyy cells of memory from lower 256
|
|
addresses (0..255), as well as random 32 cells of memories from the general
|
|
address space by amount of 2Mbytes by necessary values. For instance:
|
|
|
|
dw 03Fh:15
|
|
dw 124:1,2,3,4,5 \put into cells with address
|
|
\beginning from 124 numbers 1,2,3,4,5
|
|
|
|
12.6. Directive of installation of internal registers of complex ACCEPT.
|
|
───────────────────────────────────────────────────────────────────
|
|
|
|
ACCEPT - a directive of the installation ACCEPT will help You immediately to
|
|
install the initial condition of that internal register of the kit , which You
|
|
will need while you work. Following topics are covered:
|
|
12.6.1. Installation of internal register BC1 and BP2.
|
|
12.6.2. Installation of internal register BY4.
|
|
12.6.3. Installation of conditions external device.
|
|
12.6.4. Installation of internal register BH1.
|
|
12.6.5. Installation of speed of memory.
|
|
|
|
12.6.1. Installation of the internal register BC1 and BC2.
|
|
───────────────────────────────────────────────────────
|
|
It is Possible to produce initial installation of following registers:
|
|
- a working registers R0..R15 or all together as RGU
|
|
- a registers RQ;
|
|
- a registers RM, RN;
|
|
- a registers RA, RB.
|
|
For instance:
|
|
ACCEPT RGU: 1,2,3,4,5,6,7,8,9,0Ah,0Bh,0Ch,0Dh,0Eh,0Fh
|
|
ACCEPT RQ : 12
|
|
ACCEPT RM: 0101%
|
|
|
|
|
|
12.6.2.The Installation of internal registers ED4.
|
|
───────────────────────────────────────────────────
|
|
It is possible to produce initial installation of following register:
|
|
- a pointer of the stack SP;
|
|
- cells of the stack STACK[1]..STACK[5] or the whole stack - STACK;
|
|
- a register of the address-counter RAC;
|
|
- a register of the counter of the microinstructions MICR (PCMK).
|
|
For instance:
|
|
ACCPET SP : 3
|
|
ACCEPT STACK[3] : 0FFCh
|
|
ACCEPT PCMK : 10
|
|
|
|
12.6.3. Installing of the conditions of the external devices.
|
|
────────────────────────────────────────────────────────
|
|
It is possible to install the features of external devices (DEV):
|
|
- the type of the device: IN - input; OUT - output;
|
|
- an address of the register of the condition within 64Kb (max 0ffffh);
|
|
- an address of the register data within 64Kb (max 0ffffh);
|
|
- the time of the forming the signal "Termination of the cycle" (max 0ffffh);
|
|
- time of the forming the signal "Ready" (max 0ffffh).
|
|
For instance:
|
|
ACCEPT DEV[3]: IN, \device of the entering
|
|
0342h, \adress of register of condition in memory
|
|
0344h, \adress of the register of data
|
|
12, \how much is the termination of the cycle of
|
|
\the functioning
|
|
2, \time interval, after which the data can be
|
|
\updated.
|
|
Besides it is possible to assign an internal buffer of data DEV_BUF before 16
|
|
words for the inputting device, for instance:
|
|
ACCEPT DEV_BUF[3]: 1EF3h, 234Ah, 0E79h, 1285h
|
|
|
|
12.6.4. Installation of internal registers BH1.
|
|
─────────────────────────────────────────────
|
|
It is possible to produce initial installation of following registers:
|
|
- a register of the masks RM;(max value is 0ffh)
|
|
- a register of the permittion of the interruptions IR.
|
|
(max value is 0ffh) For instance:
|
|
|
|
ACCEPT RM : 10111001%
|
|
|
|
12.6.5. Installing the speed of working of memory.
|
|
────────────────────────────────────────────────
|
|
It is possible to produce an initial installing of the speed of the working
|
|
of the memory by means of mnemonics RDM_DELAY, for instance:
|
|
ACCEPT RDM_DELAY : 3
|
|
will install speed to memories in 3 machine tacts
|
|
|
|
12.7. Directive of inputting of switchings of conditions for BMM LINK.
|
|
───────────────────────────────────────────────────────────────────
|
|
|
|
LINK (&) - a directive of the inputting of the adjusting the connections of
|
|
the kit allows the programmer to produce all necessary adjusting of the
|
|
system right in program:
|
|
12.7.1. Adjustments of the recording in register of the address.
|
|
12.7.2. Inputting the address of transition by vector of interruptions.
|
|
12.7.3. Adjustments of converter of address of the microinstruction.
|
|
12.7.4. Adjustments of the buffer V.
|
|
12.7.5. Adjustments of enters of the multiplexor of the conditions.
|
|
12.7.6. Adjustments of registers of the inputting of operands in ALU.
|
|
|
|
12.7.1. Adjustment of the recording in register of adress.
|
|
───────────────────────────────────────────────────────
|
|
In given system the register of the address has 20 bits that with 16 bits
|
|
data bus requires two cycles of recording of information in this register; so
|
|
the register is devided into two parts, each of which controls by own signal
|
|
of recording:
|
|
- EWH for writing in senior part,
|
|
- EWL - in younger.
|
|
While adjusting the system it is necessary to assign the youngest bit of
|
|
recording by signal EWH that is to say, to assign the amount of bitt, written
|
|
by this signal. So that it can be written only for 16 bits, that, accordingly,
|
|
the starting bit can be from 4-th to 16-th inclusive.
|
|
For instance:
|
|
|
|
LINK EWH : 11 \adjust the recording in register of the address
|
|
\so as it will be recorded 10 bits of
|
|
\senior and younger
|
|
\parts of address accordingly by
|
|
\sinlals EWH or(and) EWL
|
|
|
|
12.7.2. Inputting of address of transition by vector of interruptions.
|
|
───────────────────────────────────────────────────────────────────
|
|
There is the possibility in system at appearance of inquiry for interruption
|
|
from one of 8 external devices to give on data bus the address of transition on
|
|
corresponding subprogramms of the processing of the interruption. 8 addresses
|
|
are kept in converter of the exit of the block of the priority interruptions,
|
|
presenting from itself the ROM 16*16. The enterence for given ROM is a vector
|
|
of external device VEC[0]..VEC[7]. The inputting of the address of the
|
|
transition is possible to realize for each vector apart,and also for all
|
|
vectors together:
|
|
|
|
LINK VEC[3] : 0CDEFh
|
|
LINK VEC : 1111h,2222h,3333h,4444h,
|
|
5555h,6666h,7777h,8888h
|
|
|
|
The Maximum address of the inputting - 0FFFFh.
|
|
|
|
12.7.3. Adjusting the converter of the address of microinstruction.
|
|
──────────────────────────────────────────────────────────────
|
|
There is a possibility to give on internal bus of the address of the
|
|
microinstruction the address with buses of the data moreover in free order of
|
|
the following of bits through 12-digits buffer M . The inputting is realized
|
|
by consequent enumeration of 12 connected on exits of the buffer from 11 to 0
|
|
wires from data bus from 0 to 15, for instance:
|
|
|
|
LINK M : 4,5,6,7,8,9,10,11,12,13,14,15
|
|
|
|
12.7.4.Adjusting the buffer V.
|
|
───────────────────────────
|
|
There is possibility to give on internal bus of the address of the
|
|
microinstruction directly signals of inquiry for interruption IRQ0..IRQ7, the
|
|
code of the condition CT, the general interruption INT, readiness of memories
|
|
and external devices RDM and RDD, as well as signals Z and NZ through 12 digits
|
|
buffer V .
|
|
When adjusting You necessary to enumerate all 12 connected signal, for
|
|
instance: LINK V : Z,NZ,IRQ0,IRQ1,IRQ2,IRQ3,
|
|
IRQ4,IRQ5,IRQ6,IRQ7,CT,INT
|
|
|
|
12.7.5. The adjustment of enterings of the multiplexor of conditions.
|
|
─────────────────────────────────────────────────────────────────
|
|
On the entering of the multiplexor of the conditions L[1]..L[6] it is
|
|
possible to give the signals of inquiry for interruption IRQ0..IRQ7, of the
|
|
code of the condition CT, the general interruption INT, readiness of the memory
|
|
and external devices RDM and RDD, as well as signals Z and NZ. The inputting is
|
|
realized apart how for each entering the conditions,and so the general,
|
|
for instance: LINK L : CT,INT,IRQ0,IRQ1,IRQ2,IRQ7
|
|
LINK L[3]: CT
|
|
|
|
12.7.6. Adjustment of registers of inputing of operands of ALU.
|
|
────────────────────────────────────────────────────────────
|
|
4 digits registers of ALU RA and RB allow to give on entering of the choice
|
|
of operands in ALU the data directly from data bus moreover the switching of
|
|
the wires of data bus on the entry of registers can be free and is assigned.
|
|
Adjustment of switchings of wires is realized similarly as adjusting of the
|
|
buffer M, for instance:
|
|
|
|
LINK RA : 11,12,13,14
|
|
LINK RB : 10,9,8,7
|