┌─────────────────────────────────────────────────────╖ │ 3. FIELD OF MCU (microprogramming control unit). ║ ╘═════════════════════════════════════════════════════╝ The microprogramming control unit (MCU) is built with use of chip KM1804BY4, which is intended to control the sequence samples of the microinstructions from the microinstructions (MIM). The microcircuit provides shaping 12-bit address of the microinstruction i.e. volume MIM can form 4096 words. Each microinstruction, keeping in MIM contains the field, that are controlling KM1804BY4 chip and framing equipment. Includes: Chip BY4: BY4_MI² - Microinstruction; CCE - Permit of the condition analysis; COM - Inversion of condition entry; CI - Forming the address of the next microinstruction; RLD - Unconditional loading of the address / counter register; MS - Multiplexer that selects the signal condition. ┌───────────╖ │BY4_MI².4-0║ MICROINSTRUCTION OF THE KM1804BY4 CHIP. ╘═══════════╝ ──────────────────────────────────────┘ Purpose. The microinstructions field of BY4 chip (unit of micropro- gramming control ). Correspondence to between opcode and executed function was provided in table. ┌────┬─────────────────┬───────────────────────────────────────────────┐ │ MI │ │ │ │3210│ Mnemonics │ microinstruction executed in BY4 │ ├────┼─────────────────┼───────────────────────────────────────────────┤ │0000│ JZ; │transition to zero address │ │0001│ CJS Cond,Addr; │conditional transition in subprogram by adress │ │ │ │from the microcommand register │ │0010│ JMAP Addr; │transition to address by decoder of commands │ │0011│ CJP Cond,Addr; │conditional transition to address from register│ │ │ │of the microinstructions │ │0100│ PUSH Cond,Val; │record in stack and conditional record in │ │ │ │register of adress │ │0101│ JSRP Cond,Addr; │transition to one of two subroutines: by adress│ │ │ │or from RA, or from register of the microinstr.│ │0110│ CJV Cond; │condit. trans. to address from external source │ │0111│ JRP Cond,Addr; │transit. to addr., conditionally chosen or from│ │ │ │ RÇ, or from register of microinstruction │ │1000│ RFCT; │repetition of the cycle if counter RA <> 0 │ │1001│ RPCT Addr; │repetition of the address from register of the │ │ │ │microinstructions if counter RA <> 0 │ │1010│ CRTN Cond; │conditional return from subprogram │ │1011│ CJPP Cond,Addr; │conditional transition to address from register│ │ │ │of microinstruction and reading from stack │ │1100│ LDCT Val; │record in RA │ │1101│ LOOP Cond; │conditional cessation of the cycle │ │1110│ CONT; │continuation of the work │ │1111│ TWB Cond,Addr; │branching on three directions │ └────┴─────────────────┴───────────────────────────────────────────────┘ Where Cond - checked condition; Addr, Val - numerical values of the transition address and loading RA. The note. Values are entered in binary code, that indicated by the symbol '²'on the top of field identifier (IM²). When entered a new command the code 1110 became assigned. ┌────────╖ │ CCE ║ PERMIT AN ANALYSIS OF THE CONDITION SIGNAL. ╘════════╝ ──────────────────────────────────────────┘ Purpose. Permit an analysis of the condition signal. Level : 0 - Active (analisys permit) 1 - Passive (analisys prohibited). The note. Values are entered in binary code. When entering the new command the analisys of command are prohibited. ┌─────────╖ │ COM ║ INVERSION OF INPUT CONDITION. ╘═════════╝ ────────────────────────────┘ Purpose. Inversion of input condition. Provides inversion of analysed in UMC signal. Level : 1 - Active (inversion permit) 0 - Passive (inversion prohibited). The note. Values are entered in binary code. When entering a new command the input condition are not inverted. ┌─────────╖ │ CI ║ SIGNAL FOR CALCULATION OF THE NEXT MC ADDRESS. ╘═════════╝ ─────────────────────────────────────────────┘ Purpose. Forming the address of the next microinstruction. In each tact to output address is added values of the signal at the input of CI, and that provides the automatic calculation of the address of the next microinstruction. Level : 1 - Active (address of the following microinstruction is formed); 0 - Passive (address of the next microinstruction is not formed). The note. Values are entered in binary code. When entering the new command incriment of the register is given. ┌─────────╖ │ RLD ║ UNCONDITIONAL LOADING OF A/CR. ╘═════════╝ ──────────────────────────────┘ Purpose. Unconditional loading of the address/counter register with values from bus of branching address. Level : 0 - Active (loading permit) 1 - Passive (loading prohibited). The note. Values are entered in binary code. When entering the new command save of the adress register is prohibited. ┌─────────╖ │ MS ║ MULTIPLEXER OF THE CONDITIONS. ╘═════════╝ ─────────────────────────────┘ Purpose. The signal conditionselect multiplexer. This signal (from 0 to 7) provide presenting on entering of the logical condition one of 8 signals, which adjustment is executed at switching of the connection. ┌────────┬────────┐ │controll│ output │ │ │ MS │ ├────────┼────────┤ │ 000 │ Z │ │001..110│ L1..L6 │ │ 111 │ NZ │ └────────┴────────┘ The note. To entry, from 1 to 6, is possible to connect any signal, provided in adjustment. When entering a new command the code from entry MS is given as 000.