142 lines
8.2 KiB
Plaintext
142 lines
8.2 KiB
Plaintext
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┌─────────────────────────────────────────────────────╖
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│ 3. FIELD OF MCU (microprogramming control unit). ║
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╘═════════════════════════════════════════════════════╝
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The microprogramming control unit (MCU) is built with use of
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chip KM1804BY4, which is intended to control the sequence samples
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of the microinstructions from the microinstructions (MIM).
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The microcircuit provides shaping 12-bit address of the
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microinstruction i.e. volume MIM can form 4096 words. Each
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microinstruction, keeping in MIM contains the field, that are
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controlling KM1804BY4 chip and framing equipment.
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Includes:
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Chip BY4:
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BY4_MI² - Microinstruction;
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CCE - Permit of the condition analysis;
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COM - Inversion of condition entry;
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CI - Forming the address of the next microinstruction;
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RLD - Unconditional loading of the address / counter register;
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MS - Multiplexer that selects the signal condition.
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┌───────────╖
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│BY4_MI².4-0║ MICROINSTRUCTION OF THE KM1804BY4 CHIP.
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╘═══════════╝ ──────────────────────────────────────┘
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Purpose.
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The microinstructions field of BY4 chip (unit of micropro-
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gramming control ). Correspondence to between opcode and
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executed function was provided in table.
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┌────┬─────────────────┬───────────────────────────────────────────────┐
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│ MI │ │ │
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│3210│ Mnemonics │ microinstruction executed in BY4 │
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├────┼─────────────────┼───────────────────────────────────────────────┤
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│0000│ JZ; │transition to zero address │
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│0001│ CJS Cond,Addr; │conditional transition in subprogram by adress │
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│ │ │from the microcommand register │
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│0010│ JMAP Addr; │transition to address by decoder of commands │
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│0011│ CJP Cond,Addr; │conditional transition to address from register│
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│ │ │of the microinstructions │
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│0100│ PUSH Cond,Val; │record in stack and conditional record in │
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│ │ │register of adress │
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│0101│ JSRP Cond,Addr; │transition to one of two subroutines: by adress│
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│ │ │or from RA, or from register of the microinstr.│
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│0110│ CJV Cond; │condit. trans. to address from external source │
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│0111│ JRP Cond,Addr; │transit. to addr., conditionally chosen or from│
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│ │ │ RÇ, or from register of microinstruction │
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│1000│ RFCT; │repetition of the cycle if counter RA <> 0 │
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│1001│ RPCT Addr; │repetition of the address from register of the │
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│ │ │microinstructions if counter RA <> 0 │
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│1010│ CRTN Cond; │conditional return from subprogram │
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│1011│ CJPP Cond,Addr; │conditional transition to address from register│
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│ │ │of microinstruction and reading from stack │
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│1100│ LDCT Val; │record in RA │
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│1101│ LOOP Cond; │conditional cessation of the cycle │
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│1110│ CONT; │continuation of the work │
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│1111│ TWB Cond,Addr; │branching on three directions │
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└────┴─────────────────┴───────────────────────────────────────────────┘
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Where Cond - checked condition;
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Addr, Val - numerical values of the transition address and loading RA.
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The note.
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Values are entered in binary code, that indicated by the
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symbol '²'on the top of field identifier (IM²).
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When entered a new command the code 1110 became assigned.
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┌────────╖
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│ CCE ║ PERMIT AN ANALYSIS OF THE CONDITION SIGNAL.
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╘════════╝ ──────────────────────────────────────────┘
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Purpose.
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Permit an analysis of the condition signal.
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Level : 0 - Active (analisys permit)
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1 - Passive (analisys prohibited).
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The note.
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Values are entered in binary code.
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When entering the new command the analisys of command are prohibited.
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┌─────────╖
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│ COM ║ INVERSION OF INPUT CONDITION.
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╘═════════╝ ────────────────────────────┘
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Purpose.
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Inversion of input condition. Provides inversion
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of analysed in UMC signal.
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Level : 1 - Active (inversion permit)
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0 - Passive (inversion prohibited).
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The note.
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Values are entered in binary code.
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When entering a new command the input condition are not inverted.
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┌─────────╖
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│ CI ║ SIGNAL FOR CALCULATION OF THE NEXT MC ADDRESS.
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╘═════════╝ ─────────────────────────────────────────────┘
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Purpose.
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Forming the address of the next microinstruction. In each
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tact to output address is added values of the signal
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at the input of CI, and that provides the automatic calculation
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of the address of the next microinstruction.
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Level : 1 - Active (address of the following microinstruction
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is formed);
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0 - Passive (address of the next microinstruction
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is not formed).
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The note.
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Values are entered in binary code.
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When entering the new command incriment of the register is given.
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┌─────────╖
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│ RLD ║ UNCONDITIONAL LOADING OF A/CR.
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╘═════════╝ ──────────────────────────────┘
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Purpose.
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Unconditional loading of the address/counter register
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with values from bus of branching address.
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Level : 0 - Active (loading permit)
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1 - Passive (loading prohibited).
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The note.
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Values are entered in binary code.
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When entering the new command save of the adress register is prohibited.
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┌─────────╖
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│ MS ║ MULTIPLEXER OF THE CONDITIONS.
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╘═════════╝ ─────────────────────────────┘
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Purpose.
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The signal conditionselect multiplexer. This signal
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(from 0 to 7) provide presenting on entering of the logical
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condition one of 8 signals, which adjustment is executed
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at switching of the connection.
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┌────────┬────────┐
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│controll│ output │
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│ │ MS │
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├────────┼────────┤
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│ 000 │ Z │
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│001..110│ L1..L6 │
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│ 111 │ NZ │
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└────────┴────────┘
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The note.
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To entry, from 1 to 6, is possible to connect any signal,
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provided in adjustment.
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When entering a new command the code from entry MS is
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given as 000.
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