fix division issues and add full support for both division methods

src/bitutils.py

@@ -6,7 +6,17 @@ def align_binary_to_right(value, size):
 
     return result[-size:].rjust(size, "0")
 
-al = align_binary_to_right
+ar = align_binary_to_right
+
+def align_binary_to_left(value, size):
+    if "b" in value:
+        result = value.split("b")[1]
+    else:
+        result = str(value)
+
+    return result[-size:].ljust(size, "0")
+
+al = align_binary_to_left
 
 
 def shift_left(rg, fill_bit = 0):
@@ -27,6 +37,16 @@ def sum_supplementary_codes(x, y, size):
 sum = sum_supplementary_codes
 
 
+def sum_supplementary_codes_with_overspill(x, y, size):
+    result = bin(int("0b"+x, 2) + int("0b"+y, 2))[2:]
+    if len(result) > size:
+        return al(result, size), '1'
+    else:
+        return al(result, size), '0'
+
+sump = sum_supplementary_codes_with_overspill
+
+
 def invert_bit(b):
     if b == '0':
         return '1'

src/divide.py

@@ -3,26 +3,16 @@ import bitutils as bu
 def divide(n, int_x, int_y, method):
     if method == 1:
         # getting binary values
-        x = bu.al(bin(int_x)[2:], n)
-        y = bu.al(bin(int_y)[2:], n)
+        x = bu.ar(bin(int_x)[2:], n)
+        y = bu.ar(bin(int_y)[2:], n)
 
-        # getting the inverse of X
-        x_inv = ''
-        invert = False
-        for i in x[::-1]:
-            if invert:
-                x_inv += bu.inv(i)
-            else:
-                x_inv += i
-
-            if i == '1':
-                invert = True
-
-        x_inv = x_inv[::-1]
+        # getting the supplementary code of X
+        y_inv = "".join([bu.inv(i) for i in y]) # invert
+        y_inv = bu.sum(y_inv, '1', n) # +1
 
         # writing startup register values
         # registers order: RG3, RG2, RG1
-        rg_table = [[['start', '1'*(n-1), y, x, '-'], ['start', '1'*(n-1), y, x_inv, '-']]]
+        rg_table = [[['start', '1'*(n-1), x, y, '-'], ['start', '1'*(n-1), x, y_inv, '-']]]
 
         # iterations counter
         i = 0
@@ -58,6 +48,61 @@ def divide(n, int_x, int_y, method):
 
         return rg_table, rg_table[-1][-1][1][1:]
 
+    elif method == 2:
+        # getting binary values
+        x = '0' + bu.al(bin(int_x)[2:], 2*n)
+        y = '0' + bu.al(bin(int_y)[2:], 2*n)
+
+        # writing startup register values
+        # registers order: RG3, RG2, RG1
+        rg_table = [[['start', '1'*(n+1), x, y, '-']]]
+
+        # iterations counter
+        i = 0
+
+        while rg_table[-1][-1][1][0] != '0':
+            i += 1
+            rg_table.append([])
+
+            if rg_table[-2][-1][2][0] == '1':
+                new_rg2, p = bu.sump(rg_table[-2][-1][2], rg_table[-2][0][3], 2*n+1)
+                rg_table[-1].append([
+                    i,
+                    bu.l(rg_table[-2][-1][1], p), # l(RG3).SM(p)
+                    new_rg2, # RG2 := RG2 + RG1
+                    bu.r(rg_table[-2][0][3], '0'),
+                    "RG2 := RG2 + RG1\n" \
+                    "RG1 := 0.r(RG1)\n" \
+                    "RG3 := l(RG3).SM(p)"
+                ])
+            else:
+                y_sup = ''
+                invert = False
+                for r in rg_table[-2][0][3][::-1]:
+                    if invert:
+                        y_sup += bu.inv(r)
+                    else:
+                        y_sup += r
+
+                    if r == '1':
+                        invert = True
+
+                y_sup = y_sup[::-1]
+
+                new_rg2, p = bu.sump(rg_table[-2][-1][2], y_sup, 2*n+1)
+
+                rg_table[-1].append([
+                    i,
+                    bu.l(rg_table[-2][-1][1], p), # copy previous value
+                    new_rg2, # RG2 := RG2 - RG1
+                    bu.r(rg_table[-2][0][3], '0'),
+                    "RG2 := RG2 - !RG1 + D\n" \
+                    "RG1 := 0.r(RG1)\n" \
+                    "RG3 := l(RG3).SM(p)"
+                ])
+
+        return rg_table, rg_table[-1][-1][1][1:]
+
 
 if __name__ == "__main__":
     # a fully functional reference