Revamped function scopes.

Added carry return (VERY NOT SURE IF IT WORKS CORRECTLY).

bitutilities.py

@@ -1,19 +1,40 @@
 from collections import deque
+from typing_extensions import Self
 
 
 class BasicRegister:
-    """The BasicRegister represents a hardware register capable of manipulating multiple bits at a time.
+    """
+    The BasicRegister represents a hardware register capable of manipulating multiple bits at a time.
 
     :param deque[bool] memory: The bits stored inside the register.
     """
 
     def __init__(self, memory: list[bool]):
-        """Constructor method"""
         self.memory: deque[bool] = deque(memory)
 
+    def __repr__(self) -> str:
+        return f"Memory: {[int(value) for value in  self.memory]}"
+
     def __str__(self) -> str:
         return f"Memory: {[int(value) for value in  self.memory]}"
 
+    def __len__(self) -> int:
+        return len(self.memory)
+
+    def adjusted_by_size(self, resulting_size: int) -> Self:
+        """
+        Adjusts a register to a given size.
+
+        :param int resulting_size: The size of the resulting register.
+
+        :return: A register of a specified size.
+        :rtype: BasicRegister
+        """
+        current_memory_size: int = len(self.memory)
+        return BasicRegister(
+            [False] * max(resulting_size - current_memory_size, 0) + list(self.memory)[-resulting_size:]
+        )
+
     def reverse(self):
         self.memory = deque([not value for value in self.memory])
 
@@ -27,10 +48,6 @@ class BasicRegister:
         shifted_radices: deque[bool] = deque([self.memory.pop() for _i in range(steps_shifted)])
         return shifted_radices
 
-    def adjust_size(self, s: int) -> None:
-        current_memory_size: int = len(self.memory)
-        return BasicRegister([False] * max(s - current_memory_size, 0) + list(self.memory)[-current_memory_size:])
-
 
 def get_memory(variable_name: str) -> list[bool]:
     """
@@ -50,37 +67,62 @@ def get_memory(variable_name: str) -> list[bool]:
             print(f"[ERROR] The {variable_name} may contain only 1-s and 0-s!")
 
 
-def sum(a_original: BasicRegister, b_original: BasicRegister) -> BasicRegister:
+def binary_sum(first_term: BasicRegister, second_term: BasicRegister, return_remainder: bool = False) \
+        -> BasicRegister or tuple[BasicRegister, int]:
     """
     Sums two registers' values.
 
-    :param BasicRegister a: First register.
-    :param BasicRegister b: Second register.
+    :param BasicRegister first_term: First register.
+    :param BasicRegister second_term: Second register.
+    :param bool return_remainder: True to return the tuple, False to return just the register.
 
-    :return: Register containing the result.
-    :rtype: BasicRegister
+    :return: Register containing the sum or the tuple containing the register and carried radix.
+    :rtype: BasicRegister | tuple[BasicRegister, int]
     """
-    size_a = len(a_original.memory)
-    size_b = len(b_original.memory)
+    result = BasicRegister([False] * len(first_term))
+
+    carry = False
+    for i in range(len(first_term) - 1, 0, -1):
+        current_bit_sum = first_term.memory[i] + second_term.memory[i] + carry
+        carry = bool(current_bit_sum & 2)
+        result.memory[i] = bool(current_bit_sum & 1)
+
+    final_bit_sum = first_term.memory[0] + second_term.memory[0] + carry
+    result.memory[0] = bool(final_bit_sum & 1)
+
+    if return_remainder:
+        final_carry = bool(final_bit_sum & 2)
+        return result, final_carry
+    else:
+        return result
+
+
+def binary_subtraction_1_complement(first_term: BasicRegister, second_term: BasicRegister) -> BasicRegister:
+    second_term.reverse()
+
+    result: BasicRegister
+    final_carry: bool
+    result, final_carry = binary_sum(first_term, second_term, True)
+
+    if final_carry:
+        return binary_sum(result, BasicRegister([True]))
+    else:
+        result.reverse()
+        return result
+
+
+def align_registers(first_register: BasicRegister, second_register: BasicRegister) \
+        -> tuple[BasicRegister, BasicRegister]:
+    size_a = len(first_register)
+    size_b = len(second_register)
 
     required_size = max(size_a, size_b)
 
+    a = first_register
+    b = second_register
+
     if size_a != size_b:
-        a = a_original.adjust_size(required_size)
-        b = b_original.adjust_size(required_size)
-    else:
-        a = a_original
-        b = b_original
+        a = a.adjusted_by_size(required_size)
+        b = b.adjusted_by_size(required_size)
 
-    c = BasicRegister([False] * required_size)
-
-    carry = False
-    for i in range(size_a - 1, 0, -1):
-        current_bit_sum = a.memory[i] + b.memory[i] + carry
-        carry = bool(current_bit_sum & 2)
-        c.memory[i] = bool(current_bit_sum & 1)
-
-    final_bit_sum = a.memory[0] + b.memory[0] + carry
-    c.memory[0] = bool(final_bit_sum & 1)
-
-    return c
+    return a, b

main.py

@@ -1,28 +1,31 @@
-from bitutilities import *
+import bitutilities as bu
 import timeit
 
 
 if __name__ == '__main__':
-    reg: BasicRegister = BasicRegister(get_memory("memory"))
-    # print(type(reg))
+    reg: bu.BasicRegister = bu.BasicRegister(bu.get_memory("memory"))
 
-    print("\nRegister:")
+    print()
+    print("Register 1:")
     print(reg)
 
-    print("\nReversed:")
-    reg.reverse()
-    print(reg)
+    print()
+    reg2: bu.BasicRegister = bu.BasicRegister(bu.get_memory("more memory"))
 
-    print("\nShifted left:")
-    print([int(value) for value in reg.left_shift()])
-    print(reg)
+    print()
+    print("Register 2:")
+    print(reg2)
 
-    print("\nShifted right:")
-    print([int(value) for value in reg.right_shift()])
-    print(reg)
+    reg, reg2 = bu.align_registers(reg, reg2)
 
-    reg2: BasicRegister = BasicRegister(get_memory("more memory"))
+    print()
+    sum_reg, carry = bu.binary_sum(reg, reg2, True)
 
-    reg3: BasicRegister = sum(reg, reg2)
+    print()
+    print("Sum & carry:")
+    print(sum_reg, carry)
 
-    print(reg3)
+    print()
+    subtr_reg: bu.BasicRegister = bu.binary_subtraction_1_complement(reg, reg2)
+    print("Subtraction:")
+    print(subtr_reg)