19 Commits

Author SHA1 Message Date
9e06a93c19 remove redundant method: BasicRegister.compact_str() 2023-06-28 12:59:25 +03:00
4e0e30383d add multiplication logging, include prettytable library and update input_handler menu structure 2023-06-28 12:36:02 +03:00
5a26802c34 optimize binary_sum_with_carry function by removing code repetition 2023-06-27 22:09:45 +03:00
9925c22954 add support for all multiplication methods and extend input_handler menu structure 2023-06-27 22:00:15 +03:00
6afb9151fe Documented all methods and functions. 2023-06-27 17:53:18 +03:00
32cf1e8712 Documented all methods and functions. 2023-06-27 17:49:33 +03:00
c20aef323d Rewrote align_registers to accept any number of registers. 2023-06-27 17:49:03 +03:00
32605e4b49 Introduced binary_sum_with_carry and rewrote binary_sum accordingly. 2023-06-27 17:05:40 +03:00
0f94f6d37a Minor rewrites. 2023-06-27 16:43:18 +03:00
9fedc98310 Implemented input_handler function. 2023-06-27 16:40:09 +03:00
b3c5011c11 Revamped function scopes. 2023-06-27 15:53:20 +03:00
f477c6f9e1 binary_subtraction_1_complement initial commit. 2023-06-27 15:34:39 +03:00
544031efbb Just some testing. 2023-06-27 14:18:37 +03:00
d2df4bbf28 Renamed arguments inside binary_sum.
Added carry return (VERY NOT SURE IF IT WORKS CORRECTLY).
2023-06-27 14:18:10 +03:00
132a0b5659 Changed the conditions checking register lengths. 2023-06-27 14:09:07 +03:00
75f7dba546 Implemented __repr__ and __len__ for BasicRegister. 2023-06-27 14:07:47 +03:00
f2ee4cd709 fix BasicRegister shrinking 2023-06-26 22:33:41 +03:00
8f68099309 Minor adjustments to bitutilities.py. 2023-06-26 21:58:24 +03:00
a9cfd1ec97 Merge pull request 'Core: add the sum function for BasicRegister objects' (#1) from feature-sum into master
Reviewed-on: #1
2023-06-26 21:29:25 +03:00
3 changed files with 2909 additions and 63 deletions

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@@ -1,35 +1,100 @@
from collections import deque
from typing_extensions import Self
from lib.prettytable import PrettyTable
class BasicRegister:
"""The BasicRegister represents a hardware register capable of manipulating multiple bits at a time.
"""
The BasicRegister represents a hardware register capable of manipulating multiple bits at a time.
:param deque[bool] memory: The bits stored inside the register.
"""
def __init__(self, memory: list[bool]):
"""Constructor method"""
self.memory: deque[bool] = deque(memory)
def __repr__(self) -> str:
return "".join([str(int(value)) for value in self.memory])
def __str__(self) -> str:
return f"Memory: {[int(value) for value in self.memory]}"
return "".join([str(int(value)) for value in self.memory])
def __len__(self) -> int:
return len(self.memory)
def adjusted_by_size(self, resulting_size: int) -> Self:
"""
Adjusts a register to a given size.
:param int resulting_size: The size of the resulting register.
:return: A register of a specified size.
:rtype: BasicRegister
"""
current_memory_size: int = len(self.memory)
return BasicRegister(
[False] * max(resulting_size - current_memory_size, 0) + list(self.memory)[-resulting_size:]
)
def reverse(self):
"""
Performs a logical negation on the register.
"""
self.memory = deque([not value for value in self.memory])
def left_shift(self, digit_to_fill: bool = False, steps_shifted: int = 1) -> deque[bool]:
self.memory.extend([digit_to_fill] * steps_shifted)
shifted_radices: deque[bool] = deque([self.memory.popleft() for _i in range(steps_shifted)])
return shifted_radices
def left_shift(self, shift_in_value: bool = False, bits_shifted: int = 1) -> deque[bool]:
"""
Shifts the register to the left by a specified number of steps
def right_shift(self, digit_to_fill: bool = False, steps_shifted: int = 1) -> deque[bool]:
self.memory.extendleft([digit_to_fill] * steps_shifted)
shifted_radices: deque[bool] = deque([self.memory.pop() for _i in range(steps_shifted)])
return shifted_radices
:param bool shift_in_value: The value that shifts inside the freed space.
:param int bits_shifted: The number of bits by which the register is shifted.
def adjust_size(self, s: int) -> None:
current_memory_size: int = len(self.memory)
return BasicRegister([False] * max(s - current_memory_size, 0) + list(self.memory)[-current_memory_size:])
:return: The bits shifted outside the register.
:rtype: deque[bool]
"""
self.memory.extend([shift_in_value] * bits_shifted)
shifted_bits: deque[bool] = deque([self.memory.popleft() for _i in range(bits_shifted)])
return shifted_bits
def right_shift(self, shift_in_value: bool = False, bits_shifted: int = 1) -> deque[bool]:
"""
Shifts the register to the right by a specified number of steps
:param bool shift_in_value: The value that shifts inside the freed space.
:param int bits_shifted: The number of bits by which the register is shifted.
:return: The bits shifted outside the register.
:rtype: deque[bool]
"""
self.memory.extendleft([shift_in_value] * bits_shifted)
shifted_bits: deque[bool] = deque([self.memory.pop() for _i in range(bits_shifted)])
return shifted_bits
class Counter:
"""
The Counter represents a hardware register specifically designed for countdowns.
:param int value: Initial numeric value this Counter holds.
"""
def __init__(self, value: int):
self.memory: deque[bool] = deque([i == "1" for i in bin(value)[2:]])
def __repr__(self) -> str:
return "".join([str(int(value)) for value in self.memory])
def __str__(self) -> str:
return "".join([str(int(value)) for value in self.memory])
def __len__(self) -> int:
return len(self.memory)
def decrement(self):
self.memory = binary_subtraction(self, BasicRegister([False] * (len(self.memory) - 1) + [True])).memory
def non_zero(self) -> bool:
return any(self.memory)
def get_memory(variable_name: str) -> list[bool]:
@@ -50,37 +115,266 @@ def get_memory(variable_name: str) -> list[bool]:
print(f"[ERROR] The {variable_name} may contain only 1-s and 0-s!")
def sum(a_original: BasicRegister, b_original: BasicRegister) -> BasicRegister:
def binary_sum_with_carry(first_term: BasicRegister, second_term: BasicRegister) -> tuple[BasicRegister, int]:
"""
Sums two registers' values.
Sums two registers' values and keeps the carry-out.
:param BasicRegister a: First register.
:param BasicRegister b: Second register.
:param BasicRegister first_term: First register.
:param BasicRegister second_term: Second register.
:return: Register containing the result.
:rtype: BasicRegister
:return: Register containing the sum and the carry-out bit.
:rtype: tuple[BasicRegister, int]
"""
size_a = len(a_original.memory)
size_b = len(b_original.memory)
required_size = max(size_a, size_b)
if size_a != size_b:
a = a_original.adjust_size(required_size)
b = b_original.adjust_size(required_size)
else:
a = a_original
b = b_original
c = BasicRegister([False] * required_size)
result_term = BasicRegister([False] * len(first_term))
carry = False
for i in range(size_a - 1, 0, -1):
current_bit_sum = a.memory[i] + b.memory[i] + carry
for i in range(len(first_term) - 1, -1, -1):
current_bit_sum = first_term.memory[i] + second_term.memory[i] + carry
carry = bool(current_bit_sum & 2)
c.memory[i] = bool(current_bit_sum & 1)
result_term.memory[i] = bool(current_bit_sum & 1)
final_bit_sum = a.memory[0] + b.memory[0] + carry
c.memory[0] = bool(final_bit_sum & 1)
return result_term, carry
return c
def binary_sum(first_term: BasicRegister, second_term: BasicRegister) -> BasicRegister:
"""
Sums two terms containing binary numbers.
:param BasicRegister first_term: First register to add.
:param BasicRegister second_term: Second register to add.
:return: Register containing the sum.
:rtype: BasicRegister
"""
return binary_sum_with_carry(first_term, second_term)[0]
def binary_subtraction(minuend: BasicRegister, subtrahend: BasicRegister) -> BasicRegister:
"""
Subtracts the second term from the first in binary using ones' complement.
:param BasicRegister minuend: Register to subtract from.
:param BasicRegister subtrahend: Register to subtract by.
:return: Register containing the difference.
:rtype: BasicRegister
"""
subtrahend.reverse()
difference: BasicRegister
final_carry: bool
difference, final_carry = binary_sum_with_carry(minuend, subtrahend)
if final_carry:
return binary_sum(difference, BasicRegister([False] * (len(difference) - 1) + [True]))
else:
difference.reverse()
return difference
# def align_registers(first_register: BasicRegister, second_register: BasicRegister) \
# -> tuple[BasicRegister, BasicRegister]:
# """
# Aligns two registers by the length of the bigger one.
#
# :param BasicRegister first_register:
# :param BasicRegister second_register:
#
# :return:
# :rtype: tuple[BasicRegister, BasicRegister]
# """
# first_size = len(first_register)
# second_size = len(second_register)
#
# required_size = max(first_size, second_size)
#
# if first_size != second_size:
# return first_register.adjusted_by_size(required_size), second_register.adjusted_by_size(required_size)
# else:
# return first_register, second_register
def align_registers(*registers: BasicRegister) -> tuple[BasicRegister, ...]:
"""
Aligns registers by the length of the bigger one.
:param BasicRegister registers: Registers to align.
:return: Aligned registers.
:rtype: tuple[BasicRegister, ...]
"""
required_size: int = max(map(len, registers))
return tuple(reg.adjusted_by_size(required_size) for reg in registers)
def format_device_state_table(table) -> str:
pt = PrettyTable()
pt.field_names = table[0]
for block in table[1:]:
for line in block[:-1]:
pt.add_row(line)
pt.add_row(block[-1], divider = True)
return pt.get_string()
def binary_multiplication_method_1(first_term: BasicRegister, second_term: BasicRegister) -> BasicRegister:
"""
Multiplies two terms containing binary numbers using first method.
:param BasicRegister first_term: First register to multiply.
:param BasicRegister second_term: Second register to multiply.
:return: Register containing the product.
:rtype: BasicRegister
"""
first_term, second_term = align_registers(first_term, second_term)
n: int = len(first_term)
rg1 = BasicRegister([False] * n)
rg2 = BasicRegister(first_term.memory)
rg3 = BasicRegister(second_term.memory)
ct = Counter(n)
data_table = [["iter", "RG1", "RG2", "RG3", "CT", "MicroOperations"]]
i = 0
data_table.append([])
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, ct, "-"])))
while ct.non_zero():
i += 1
data_table.append([])
if rg2.memory[n-1]:
rg1 = binary_sum(rg1, rg3)
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, ct, "RG1 := RG1 + RG3"])))
rg2.right_shift(rg1.memory[n-1])
rg1.right_shift()
ct.decrement()
print(ct.memory)
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, ct, "RG2 := RG1[1].r(RG2)\nRG1 := 0.r(RG1)\nCT := CT - 1"])))
return BasicRegister(list(rg1.memory) + list(rg2.memory)), data_table
def binary_multiplication_method_2(first_term: BasicRegister, second_term: BasicRegister) -> BasicRegister:
"""
Multiplies two terms containing binary numbers using second method.
:param BasicRegister first_term: First register to multiply.
:param BasicRegister second_term: Second register to multiply.
:return: Register containing the product.
:rtype: BasicRegister
"""
first_term, second_term = align_registers(first_term, second_term)
n: int = len(first_term)
rg1 = BasicRegister([False] * (2*n))
rg2 = BasicRegister(first_term.memory)
rg3 = BasicRegister([False] * n + list(second_term.memory))
i = 0
data_table = [["iter", "RG1", "RG2", "RG3", "MicroOperations"]]
data_table.append([])
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, "-"])))
while any(rg2.memory):
i += 1
data_table.append([])
if rg2.memory[n-1]:
rg1 = binary_sum(rg1, rg3)
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, "RG1 := RG1 + RG3"])))
rg2.right_shift()
rg3.left_shift()
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, "RG2 := 0.r(RG2)\nRG3 := l(RG3).0"])))
return rg1, data_table
def binary_multiplication_method_3(first_term: BasicRegister, second_term: BasicRegister) -> BasicRegister:
"""
Multiplies two terms containing binary numbers using third method.
:param BasicRegister first_term: First register to multiply.
:param BasicRegister second_term: Second register to multiply.
:return: Register containing the product.
:rtype: BasicRegister
"""
first_term, second_term = align_registers(first_term, second_term)
n: int = len(first_term)
data_table = [["iter", "RG2", "RG1", "RG3", "CT", "MicroOperations"]]
rg1 = BasicRegister([False] * n)
rg2 = BasicRegister(list(first_term.memory) + [False])
rg3 = BasicRegister([False] * (n+1) + list(second_term.memory))
ct = Counter(n)
i = 0
data_table.append([])
data_table[-1].append(list(map(str, [i, rg2, rg1, rg3, ct, "-"])))
while ct.non_zero():
i += 1
data_table.append([])
if rg2.memory[0]:
result: list[bool] = list(binary_sum(BasicRegister(rg2.memory + rg1.memory), rg3).memory)
rg2 = BasicRegister(result[:n+1])
rg1 = BasicRegister(result[n+1:])
data_table[-1].append(list(map(str, [i, rg2, rg1, rg3, ct, "RG2.RG1 := RG2.RG1 + RG3"])))
rg2.left_shift(rg1.memory[0])
rg1.left_shift()
ct.decrement()
data_table[-1].append(list(map(str, [i, rg2, rg1, rg3, ct, "RG2.RG1 := l(RG2.RG1).0\nCT := CT - 1"])))
return BasicRegister((list(rg2.memory) + list(rg1.memory))[:-1]), data_table
def binary_multiplication_method_4(first_term: BasicRegister, second_term: BasicRegister) -> BasicRegister:
"""
Multiplies two terms containing binary numbers using fourth method.
:param BasicRegister first_term: First register to multiply.
:param BasicRegister second_term: Second register to multiply.
:return: Register containing the product.
:rtype: BasicRegister
"""
first_term, second_term = align_registers(first_term, second_term)
n: int = len(first_term)
rg1 = BasicRegister([False] * (2*n+1))
rg2 = BasicRegister(first_term.memory)
rg3 = BasicRegister([False] + list(second_term.memory) + [False] * n)
data_table = [["iter", "RG1", "RG2", "RG3", "MicroOperations"]]
i = 0
data_table.append([])
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, "-"])))
while any(rg2.memory):
i += 1
data_table.append([])
if rg2.memory[0]:
rg1 = binary_sum(rg1, rg3)
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, "RG1 := RG1 + RG3"])))
rg2.left_shift()
rg3.right_shift()
data_table[-1].append(list(map(str, [i, rg1, rg2, rg3, "RG2 := l(RG2).0\nRG3 := 0.r(RG3)"])))
return BasicRegister(list(rg1.memory)[:-1]), data_table

2534
lib/prettytable.py Normal file

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66
main.py
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@@ -1,28 +1,46 @@
from bitutilities import *
import timeit
import bitutilities as bu
def input_handler(first_register: bu.BasicRegister, second_register: bu.BasicRegister):
first_register, second_register = bu.align_registers(first_register, second_register)
print()
print(first_register)
print(second_register)
while True:
print()
match input("Choose the operation:\n[a]ddition, [s]ubtraction, [m]ultiplication, [d]ivision, [q]uit\n>>> "):
case "a":
print(f"Sum:\n{bu.binary_sum(first_register, second_register)}")
case "s":
print(f"Subtraction:\n{bu.binary_subtraction(first_register, second_register)}")
case "m":
match input("Choose method to use (1-4):\n>>> "):
case "1":
result, data_table = bu.binary_multiplication_method_1(first_register, second_register)
print(f"Multiplication:\n{bu.format_device_state_table(data_table)}\nResult: {result}")
case "2":
result, data_table = bu.binary_multiplication_method_2(first_register, second_register)
print(f"Multiplication:\n{bu.format_device_state_table(data_table)}\nResult: {result}")
case "3":
result, data_table = bu.binary_multiplication_method_3(first_register, second_register)
print(f"Multiplication:\n{bu.format_device_state_table(data_table)}\nResult: {result}")
case "4":
result, data_table = bu.binary_multiplication_method_4(first_register, second_register)
print(f"Multiplication:\n{bu.format_device_state_table(data_table)}\nResult: {result}")
case _:
print("Such method does not exist, try again.")
case "d":
pass
case "q":
exit()
case _:
print("Not an available operation, try again.")
if __name__ == '__main__':
reg: BasicRegister = BasicRegister(get_memory("memory"))
# print(type(reg))
reg: bu.BasicRegister = bu.BasicRegister(bu.get_memory("memory"))
reg2: bu.BasicRegister = bu.BasicRegister(bu.get_memory("more memory"))
print("\nRegister:")
print(reg)
print("\nReversed:")
reg.reverse()
print(reg)
print("\nShifted left:")
print([int(value) for value in reg.left_shift()])
print(reg)
print("\nShifted right:")
print([int(value) for value in reg.right_shift()])
print(reg)
reg2: BasicRegister = BasicRegister(get_memory("more memory"))
reg3: BasicRegister = sum(reg, reg2)
print(reg3)
input_handler(reg, reg2)