fix BasicRegister shrinking

Reviewed-on: #1

bitutilities.py

@@ -1,8 +1,10 @@
 from collections import deque
+from typing_extensions import Self
 
 
 class BasicRegister:
-    """The BasicRegister represents a hardware register capable of manipulating multiple bits at a time.
+    """
+    The BasicRegister represents a hardware register capable of manipulating multiple bits at a time.
 
     :param deque[bool] memory: The bits stored inside the register.
     """
@@ -14,6 +16,20 @@ class BasicRegister:
     def __str__(self) -> str:
         return f"Memory: {[int(value) for value in  self.memory]}"
 
+    def adjusted_by_size(self, resulting_size: int) -> Self:
+        """
+        Adjusts a register to a given size.
+
+        :param int resulting_size: The size of the resulting register.
+
+        :return: A register of a specified size.
+        :rtype: BasicRegister
+        """
+        current_memory_size: int = len(self.memory)
+        return BasicRegister(
+            [False] * max(resulting_size - current_memory_size, 0) + list(self.memory)[-resulting_size:]
+        )
+
     def reverse(self):
         self.memory = deque([not value for value in self.memory])
 
@@ -27,10 +43,6 @@ class BasicRegister:
         shifted_radices: deque[bool] = deque([self.memory.pop() for _i in range(steps_shifted)])
         return shifted_radices
 
-    def adjust_size(self, s: int) -> None:
-        current_memory_size: int = len(self.memory)
-        return BasicRegister([False] * max(s - current_memory_size, 0) + list(self.memory)[-current_memory_size:])
-
 
 def get_memory(variable_name: str) -> list[bool]:
     """
@@ -50,14 +62,14 @@ def get_memory(variable_name: str) -> list[bool]:
             print(f"[ERROR] The {variable_name} may contain only 1-s and 0-s!")
 
 
-def sum(a_original: BasicRegister, b_original: BasicRegister) -> BasicRegister:
+def binary_sum(a_original: BasicRegister, b_original: BasicRegister) -> BasicRegister:
     """
     Sums two registers' values.
 
-    :param BasicRegister a: First register.
-    :param BasicRegister b: Second register.
+    :param BasicRegister a_original: First register.
+    :param BasicRegister b_original: Second register.
 
-    :return: Register containing the result.
+    :return: Register containing the sum.
     :rtype: BasicRegister
     """
     size_a = len(a_original.memory)
@@ -66,8 +78,8 @@ def sum(a_original: BasicRegister, b_original: BasicRegister) -> BasicRegister:
     required_size = max(size_a, size_b)
 
     if size_a != size_b:
-        a = a_original.adjust_size(required_size)
-        b = b_original.adjust_size(required_size)
+        a = a_original.adjusted_by_size(required_size)
+        b = b_original.adjusted_by_size(required_size)
     else:
         a = a_original
         b = b_original
@@ -75,7 +87,7 @@ def sum(a_original: BasicRegister, b_original: BasicRegister) -> BasicRegister:
     c = BasicRegister([False] * required_size)
 
     carry = False
-    for i in range(size_a - 1, 0, -1):
+    for i in range(required_size - 1, 0, -1):
         current_bit_sum = a.memory[i] + b.memory[i] + carry
         carry = bool(current_bit_sum & 2)
         c.memory[i] = bool(current_bit_sum & 1)

main.py

@@ -23,6 +23,6 @@ if __name__ == '__main__':
 
     reg2: BasicRegister = BasicRegister(get_memory("more memory"))
 
-    reg3: BasicRegister = sum(reg, reg2)
+    reg3: BasicRegister = binary_sum(reg, reg2)
 
     print(reg3)