18 Commits

Author SHA1 Message Date
dymik739 d25dacf35b add sum function for addition of two registers 2023-06-26 21:05:45 +03:00
Rhinemann 4dfd6ef417 revert 65750694e4
revert Delete 'bitutilities.py'
2023-06-26 00:26:09 +03:00
Rhinemann a6e4b4b4d6 revert e80304f84d
revert Delete 'main.py'
2023-06-26 00:24:47 +03:00
Rhinemann b64516243c revert 0dc2bd3950
revert Delete 'README.md'
2023-06-26 00:24:33 +03:00
Rhinemann d2eaf9fe76 revert c730e0d1bd
revert Rusty implementation.
2023-06-26 00:23:54 +03:00
Rhinemann c730e0d1bd Rusty implementation. 2023-06-26 00:24:45 +03:00
Rhinemann e80304f84d Delete 'main.py' 2023-06-26 00:15:11 +03:00
Rhinemann 65750694e4 Delete 'bitutilities.py' 2023-06-26 00:15:07 +03:00
Rhinemann 0dc2bd3950 Delete 'README.md' 2023-06-26 00:15:01 +03:00
Rhinemann ede83eeb8e Optimised reverse method (I have proofs of speed) (I have been slightly mistaken). 2023-06-25 22:57:12 +03:00
Rhinemann f747e3b530 Optimised reverse method (I have proofs of speed). 2023-06-25 22:33:52 +03:00
Rhinemann f508ca51c8 Modified prints for readability (again). 2023-06-25 22:32:34 +03:00
Rhinemann 66c9f833a6 Modified the way shifted radices are printed for readability. 2023-06-25 21:59:47 +03:00
Rhinemann e5a88058ed Swapped list for decue for BasicRegister's memory to optimise shifting methods for both directions.
Moved get_memory to the end.
2023-06-25 21:58:43 +03:00
Rhinemann 198e984e32 Commit. 2023-06-25 19:39:37 +03:00
Rhinemann 9118bb16a9 Simplified the __str__ method. 2023-06-18 15:02:29 +03:00
Rhinemann 0a956e8500 Changed the get_memory check for number. 2023-06-18 14:52:56 +03:00
Rhinemann 9f12616eca Shift methods updated. 2023-06-18 14:51:13 +03:00
3 changed files with 104 additions and 37 deletions
-24
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@@ -1,24 +0,0 @@
class BasicRegister:
def __init__(self, memory: list[bool]):
self.memory: list[bool] = memory
def __str__(self) -> str:
return f"Memory: [{', '.join([str(int(value)) for value in self.memory])}]"
def reverse(self):
self.memory = [not value for value in self.memory]
def left_shift(self, steps_shifted: int) -> list[bool]:
self.memory.extend([False] * steps_shifted)
shifted_radices: list[bool] = self.memory[:steps_shifted]
del self.memory[:steps_shifted]
return shifted_radices
def right_shift(self, steps_shifted: int) -> list[bool]:
self.memory[:0] = [False] * steps_shifted
shifted_radices: list[bool] = self.memory[-steps_shifted:]
del self.memory[-steps_shifted:]
return shifted_radices
+86
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@@ -0,0 +1,86 @@
from collections import deque
class BasicRegister:
"""The BasicRegister represents a hardware register capable of manipulating multiple bits at a time.
:param deque[bool] memory: The bits stored inside the register.
"""
def __init__(self, memory: list[bool]):
"""Constructor method"""
self.memory: deque[bool] = deque(memory)
def __str__(self) -> str:
return f"Memory: {[int(value) for value in self.memory]}"
def reverse(self):
self.memory = deque([not value for value in self.memory])
def left_shift(self, digit_to_fill: bool = False, steps_shifted: int = 1) -> deque[bool]:
self.memory.extend([digit_to_fill] * steps_shifted)
shifted_radices: deque[bool] = deque([self.memory.popleft() for _i in range(steps_shifted)])
return shifted_radices
def right_shift(self, digit_to_fill: bool = False, steps_shifted: int = 1) -> deque[bool]:
self.memory.extendleft([digit_to_fill] * steps_shifted)
shifted_radices: deque[bool] = deque([self.memory.pop() for _i in range(steps_shifted)])
return shifted_radices
def adjust_size(self, s: int) -> None:
current_memory_size: int = len(self.memory)
return BasicRegister([False] * max(s - current_memory_size, 0) + list(self.memory)[-current_memory_size:])
def get_memory(variable_name: str) -> list[bool]:
"""
Reads user input to be used as a memory array.
:param str variable_name: The name to be displayed in the input line.
:return: A list of boolean values read from user.
:rtype: list[bool]
"""
while True:
input_chars: list[str] = list(input(f"Enter {variable_name}: "))
if all(character in ["0", "1"] for character in input_chars):
return [True if character == "1" else False for character in input_chars]
else:
print(f"[ERROR] The {variable_name} may contain only 1-s and 0-s!")
def sum(a_original: BasicRegister, b_original: BasicRegister) -> BasicRegister:
"""
Sums two registers' values.
:param BasicRegister a: First register.
:param BasicRegister b: Second register.
:return: Register containing the result.
:rtype: BasicRegister
"""
size_a = len(a_original.memory)
size_b = len(b_original.memory)
required_size = max(size_a, size_b)
if size_a != size_b:
a = a_original.adjust_size(required_size)
b = b_original.adjust_size(required_size)
else:
a = a_original
b = b_original
c = BasicRegister([False] * required_size)
carry = False
for i in range(size_a - 1, 0, -1):
current_bit_sum = a.memory[i] + b.memory[i] + carry
carry = bool(current_bit_sum & 2)
c.memory[i] = bool(current_bit_sum & 1)
final_bit_sum = a.memory[0] + b.memory[0] + carry
c.memory[0] = bool(final_bit_sum & 1)
return c
+18 -13
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@@ -1,23 +1,28 @@
from BasicRegister import BasicRegister
def get_memory(variable_name: str) -> list[bool]:
while True:
input_chars: list[str] = list(input(f"Enter {variable_name}: "))
if all(character.isnumeric() and (character == "1" or character == "0") for character in input_chars):
return [True if character == "1" else False for character in input_chars]
else:
print(f"[ERROR] The {variable_name} may contain only 1-s and 0-s!")
from bitutilities import *
import timeit
if __name__ == '__main__':
reg: BasicRegister = BasicRegister(get_memory("memory"))
# print(type(reg))
print("\nRegister:")
print(reg)
print(reg.left_shift(3))
print("\nReversed:")
reg.reverse()
print(reg)
print(reg.right_shift(3))
print("\nShifted left:")
print([int(value) for value in reg.left_shift()])
print(reg)
print("\nShifted right:")
print([int(value) for value in reg.right_shift()])
print(reg)
reg2: BasicRegister = BasicRegister(get_memory("more memory"))
reg3: BasicRegister = sum(reg, reg2)
print(reg3)