fix wrong carry bit output

2023-06-27 15:00:10 +03:00 · 2023-06-27 15:00:10 +03:00 · 6413927d70
parent 544031efbb
commit 6413927d70
1 changed files with 1 additions and 0 deletions
--- a/bitutilities.py
+++ b/bitutilities.py
@ -100,6 +100,7 @@ def binary_sum(first_term: BasicRegister, second_term: BasicRegister, return_rem
        c.memory[i] = bool(current_bit_sum & 1)

    final_bit_sum = a.memory[0] + b.memory[0] + carry
+    carry = bool(final_bit_sum & 2)
    c.memory[0] = bool(final_bit_sum & 1)

    if return_remainder: