Rewrote bit shifts.

This commit is contained in:
Rhinemann 2023-06-27 22:28:01 +03:00
parent 81f190dc60
commit 289b87a556
1 changed files with 8 additions and 4 deletions

View File

@ -53,8 +53,10 @@ impl BasicRegister {
let bits_shifted: usize = bits_shifted_default.unwrap_or(1) as usize;
let mut shifted_bits: VecDeque<bool> = [].into();
(0..bits_shifted).for_each(|_| shifted_bits.push_back(self.memory.pop_front().unwrap()));
(0..bits_shifted).for_each(|_| self.memory.push_back(shift_in_value));
for _i in 0..bits_shifted {
shifted_bits.push_back(self.memory.pop_front().unwrap());
self.memory.push_back(shift_in_value)
}
shifted_bits
}
@ -68,8 +70,10 @@ impl BasicRegister {
let bits_shifted: usize = bits_shifted_default.unwrap_or(1) as usize;
let mut shifted_bits: VecDeque<bool> = [].into();
(0..bits_shifted).for_each(|_| shifted_bits.push_back(self.memory.pop_back().unwrap()));
(0..bits_shifted).for_each(|_| self.memory.push_front(shift_in_value));
for _i in 0..bits_shifted {
shifted_bits.push_back(self.memory.pop_back().unwrap());
self.memory.push_front(shift_in_value)
}
shifted_bits
}